Paper Abstract and Keywords |
Presentation |
2011-02-14 15:15
An Extended 2-D FPGA Array for CIP Circuit Jiang Li, Kenichi Takahashi, Hakaru Tamukoh, Masatoshi Sekine (TUAT) DC2010-67 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
The general-purpose processer is used in the most of HPC computer. In recent years,special-purpose processer used in HPC are increasing. We propose an FPGA array which accumulated a lot of small cards with the three-dimensional I/O. The FPGA Array is based on hw/sw complex, and it is a general-purpose HPC system. In this paper, we design a method of an Extended 2-D FPGA Array based on the existing 1-D FPGA Array design. We implemented CIP method arithmetic circuit on the FPGA Array and evaluated its performance. In addition, we compared FPGA Array with software processed by CPU and CUDA which is one of the GPGPU. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
FPGA Array / hw/sw complex / CIP method / CUDA / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 413, DC2010-67, pp. 51-56, Feb. 2011. |
Paper # |
DC2010-67 |
Date of Issue |
2011-02-07 (DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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DC2010-67 |
Conference Information |
Committee |
DC |
Conference Date |
2011-02-14 - 2011-02-14 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
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Paper Information |
Registration To |
DC |
Conference Code |
2011-02-DC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An Extended 2-D FPGA Array for CIP Circuit |
Sub Title (in English) |
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Keyword(1) |
FPGA Array |
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hw/sw complex |
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CIP method |
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CUDA |
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1st Author's Name |
Jiang Li |
1st Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
2nd Author's Name |
Kenichi Takahashi |
2nd Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
3rd Author's Name |
Hakaru Tamukoh |
3rd Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
4th Author's Name |
Masatoshi Sekine |
4th Author's Affiliation |
Tokyo University of Agriculture and Technology (TUAT) |
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Speaker |
Author-1 |
Date Time |
2011-02-14 15:15:00 |
Presentation Time |
25 minutes |
Registration for |
DC |
Paper # |
DC2010-67 |
Volume (vol) |
vol.110 |
Number (no) |
no.413 |
Page |
pp.51-56 |
#Pages |
6 |
Date of Issue |
2011-02-07 (DC) |
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