Paper Abstract and Keywords |
Presentation |
2011-03-02 13:10
An Architecture Exploration Method based on a Branch-and-Bound Strategy for Embedded VLIW Processors Kohei Aoki, Ittetsu Taniguchi, Hiroyuki Tomiyama, Masahiro Fukui (Ritsumeikan Univ.) VLD2010-116 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper proposes an architecture exploration method based on a branch-and-bound strategy for embedded VLIW processors. Efficient exploration of the optimal architecture is very important problem because of the huge design space. In this paper, VLIW processors are parameterized by the number of slots, register file size, and loop buffer depth. The architecture exploration problem is formally defined, and a exploration algorithm based on the branch-and-bound is proposed, which finds an energy-optimal architecture with required performance. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
VLIW Processors / Architecture Exploration / Design Optimization / Branch-and-Bound Strategy / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 432, VLD2010-116, pp. 1-6, March 2011. |
Paper # |
VLD2010-116 |
Date of Issue |
2011-02-23 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2010-116 |
Conference Information |
Committee |
VLD |
Conference Date |
2011-03-02 - 2011-03-04 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Okinawaken-Danjo-Kyodo-Sankaku Center |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon |
Paper Information |
Registration To |
VLD |
Conference Code |
2011-03-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An Architecture Exploration Method based on a Branch-and-Bound Strategy for Embedded VLIW Processors |
Sub Title (in English) |
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Keyword(1) |
VLIW Processors |
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Architecture Exploration |
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Design Optimization |
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Branch-and-Bound Strategy |
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1st Author's Name |
Kohei Aoki |
1st Author's Affiliation |
Ritsumeikan University (Ritsumeikan Univ.) |
2nd Author's Name |
Ittetsu Taniguchi |
2nd Author's Affiliation |
Ritsumeikan University (Ritsumeikan Univ.) |
3rd Author's Name |
Hiroyuki Tomiyama |
3rd Author's Affiliation |
Ritsumeikan University (Ritsumeikan Univ.) |
4th Author's Name |
Masahiro Fukui |
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Ritsumeikan University (Ritsumeikan Univ.) |
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Speaker |
Author-1 |
Date Time |
2011-03-02 13:10:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2010-116 |
Volume (vol) |
vol.110 |
Number (no) |
no.432 |
Page |
pp.1-6 |
#Pages |
6 |
Date of Issue |
2011-02-23 (VLD) |
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