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Paper Abstract and Keywords
Presentation 2011-07-01 13:30
Delay Analysis of Sub-Paths with Correlation
Masatsugu Hosoki, Takanobu Shiki, Yasuhiro Takashima (Univ. of Kitakyushu) CAS2011-23 VLD2011-30 SIP2011-52 MSS2011-23
Abstract (in Japanese) (See Japanese page) 
(in English) This paper proposes an estimation method of the sub-paths with correlations. In recent years, the process variation may degrade the yield.One of the reasons of less yield is timing error. The timing error is caused by the variation from the expected value on the design changing the clock arrival times of Filp-flops(FFs) and the path-delays between FFs. To recover this error, it is important to recognize the condition of the chip, especially the path-delay time. For the recognition of the delay, the estimation method of sub-paths with path-delay tests has been proposed. The method is mathemetically correct, but it needs any pair of sub-paths is independent. In this paper, the estimation is enhanced to the varitions with correlation. The proposed method utilizes that the variations with the correlation are described by the weight sum of independednt random number using the coefficient from the correlations. We confirmed the correctness of the porposed method compared with the Monte Carlo simulation.
Keyword (in Japanese) (See Japanese page) 
(in English) correlation / sub-paths / delay estimation / path-delay test / Cholesky decomposition / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 103, VLD2011-30, pp. 129-134, June 2011.
Paper # VLD2011-30 
Date of Issue 2011-06-23 (CAS, VLD, SIP, MSS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2011-23 VLD2011-30 SIP2011-52 MSS2011-23

Conference Information
Committee MSS CAS VLD SIP  
Conference Date 2011-06-30 - 2011-07-01 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa-Ken-Seinen-Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2011-06-MSS-CAS-VLD-SIP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Delay Analysis of Sub-Paths with Correlation 
Sub Title (in English)  
Keyword(1) correlation  
Keyword(2) sub-paths  
Keyword(3) delay estimation  
Keyword(4) path-delay test  
Keyword(5) Cholesky decomposition  
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1st Author's Name Masatsugu Hosoki  
1st Author's Affiliation University of Kitakyushu (Univ. of Kitakyushu)
2nd Author's Name Takanobu Shiki  
2nd Author's Affiliation University of Kitakyushu (Univ. of Kitakyushu)
3rd Author's Name Yasuhiro Takashima  
3rd Author's Affiliation University of Kitakyushu (Univ. of Kitakyushu)
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Speaker Author-1 
Date Time 2011-07-01 13:30:00 
Presentation Time 20 minutes 
Registration for VLD 
Paper # CAS2011-23, VLD2011-30, SIP2011-52, MSS2011-23 
Volume (vol) vol.111 
Number (no) no.102(CAS), no.103(VLD), no.104(SIP), no.105(MSS) 
Page pp.129-134 
#Pages
Date of Issue 2011-06-23 (CAS, VLD, SIP, MSS) 


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