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Paper Abstract and Keywords
Presentation 2011-08-25 14:30
A Low Power 90-nm CMOS Motion Estimation Processor Array Implementing Stick-shaped Search Window (SSW) Block Matching Algorithm
Tadayoshi Enomoto (Chuo Univ.) SDM2011-79 ICD2011-47
Abstract (in Japanese) (See Japanese page) 
(in English) To construct a codec processor for the super high definition television (SHV) we have developed an extremely fast block matching (BM) algorithm that we call a “Stick-shaped Search Window (SSW)” BM algorithm and a small and low-power CMOS parallel array. The SSW algorithm consists of three steps: (1) sub-sampling BM in a reduced number of stick-shaped windows, (2) alternate eight-direction sub-sampling BM, and (3) cyclic three-point BM. The SSW algorithm not only improves full search (FS) processing speed by a factor of up to 1,696, but also that of a simplified unsymmetrical-cross multi-hexagon-grid search (S-UMHS) by a factor of up to 7.87, while achieving the same visual quality as that of FS. The power dissipation (p) of the parallel array is 10.35 mW (at f = 2 GHz and VDD = 1V) that is 1/8.58 of p of a conventional CMOS array. For SHV only six 320-MHz parallel arrays are required so that total power dissipation is only 62.1 mW that confirms to build a low-power SHV system.
Keyword (in Japanese) (See Japanese page) 
(in English) super high definition television / SHV / HDTV / H.264/AVC / motion vector estimation / sub-sampling / array / block matching  
Reference Info. IEICE Tech. Rep., vol. 111, no. 188, ICD2011-47, pp. 47-52, Aug. 2011.
Paper # ICD2011-47 
Date of Issue 2011-08-18 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2011-79 ICD2011-47

Conference Information
Committee SDM ICD  
Conference Date 2011-08-25 - 2011-08-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Toyama kenminkaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To ICD 
Conference Code 2011-08-SDM-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Low Power 90-nm CMOS Motion Estimation Processor Array Implementing Stick-shaped Search Window (SSW) Block Matching Algorithm 
Sub Title (in English)  
Keyword(1) super high definition television  
Keyword(2) SHV  
Keyword(3) HDTV  
Keyword(4) H.264/AVC  
Keyword(5) motion vector estimation  
Keyword(6) sub-sampling  
Keyword(7) array  
Keyword(8) block matching  
1st Author's Name Tadayoshi Enomoto  
1st Author's Affiliation Chuo University (Chuo Univ.)
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Speaker Author-1 
Date Time 2011-08-25 14:30:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2011-79, ICD2011-47 
Volume (vol) vol.111 
Number (no) no.187(SDM), no.188(ICD) 
Page pp.47-52 
#Pages 6 
Date of Issue 2011-08-18 (SDM, ICD) 

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