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Paper Abstract and Keywords
Presentation 2011-08-25 14:55
Novel power reduction technique for ReRAM with the automatic evasion circuit of the wasteful overwrite
Takaya Handa, Kazuya Nakayama, Akio Kitagawa, Junichi Akita (Kanazawa Univ.) SDM2011-80 ICD2011-48
Abstract (in Japanese) (See Japanese page) 
(in English) ReRAM (Resistance Random Access Memory) is widely expected as a next generation memory and further researches have been developed. Low power operation can be a great advantage of ReRAM device. However, the wasteful overwrite such as the SET operation to low resistance state device and the RESET operation to high resistance state device causes not only the increase of power but also the degradation of write cycles by rewriting repeatedly. Thus, in this paper, we proposed novel automatic evasion circuit of the wasteful overwrite by incorporating the sense amplifier and estimated the reduction rate of energy consumption by circuit simulation. As a result, this circuit enabled to evade the wasteful overwrite operation reliably to reduce the wasteful energy.
Keyword (in Japanese) (See Japanese page) 
(in English) ReRAM / Low power / Program circuit / Read circuit / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 188, ICD2011-48, pp. 53-57, Aug. 2011.
Paper # ICD2011-48 
Date of Issue 2011-08-18 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2011-80 ICD2011-48

Conference Information
Committee SDM ICD  
Conference Date 2011-08-25 - 2011-08-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Toyama kenminkaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To ICD 
Conference Code 2011-08-SDM-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Novel power reduction technique for ReRAM with the automatic evasion circuit of the wasteful overwrite 
Sub Title (in English)  
Keyword(1) ReRAM  
Keyword(2) Low power  
Keyword(3) Program circuit  
Keyword(4) Read circuit  
Keyword(5)  
Keyword(6)  
Keyword(7)  
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1st Author's Name Takaya Handa  
1st Author's Affiliation Kanazawa University (Kanazawa Univ.)
2nd Author's Name Kazuya Nakayama  
2nd Author's Affiliation Kanazawa University (Kanazawa Univ.)
3rd Author's Name Akio Kitagawa  
3rd Author's Affiliation Kanazawa University (Kanazawa Univ.)
4th Author's Name Junichi Akita  
4th Author's Affiliation Kanazawa University (Kanazawa Univ.)
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Speaker Author-1 
Date Time 2011-08-25 14:55:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2011-80, ICD2011-48 
Volume (vol) vol.111 
Number (no) no.187(SDM), no.188(ICD) 
Page pp.53-57 
#Pages 5 
Date of Issue 2011-08-18 (SDM, ICD) 

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