Paper Abstract and Keywords |
Presentation |
2011-09-08 15:00
A Study of Scale Reduction of Analog Circuits for an Adaptive Array with a Single Receiver Using Time-Division Multiplexing Ken-ichi Koga (Tokai Rika/Nagoya Inst. of Tech.), Nobuyoshi Kikuma, Hiroshi Hirayama, Kunio Sakakibara (Nagoya Inst. of Tech.), Tatsuya Koike, Hiroaki Iwashita, Yoshiyuki Mizuno (Tokai Rika) AP2011-65 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We propose the scale reduction method of analog circuits for an adaptive array antenna. A conventional adaptive array antenna needs the analog circuits, such as the filter, amplifier, down converter and AD converter, for each antenna. Accordingly, it is a problem that the scale of the analog circuits for the conventional adaptive array antenna system is larger than the one for the single antenna system. In the past study, the method of scale reduction of the analog circuits, which are time-division multiplexed and share the parts except the amplifier and the filter, is proposed. However, this method requires the high performance amplifier because of the power loss due to switching. Therefore, in this paper, we propose the compressing method of switching power loss for the scale reduction of analog circuits by sharing the single amplifier. Via computer simulation, it is confirmed by the comparison with the conventional adaptive array antenna that our proposed method is effective. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
time-division multiplexing / adaptive array / single receiver / scale reduction of analog circuits / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 111, no. 200, AP2011-65, pp. 7-12, Sept. 2011. |
Paper # |
AP2011-65 |
Date of Issue |
2011-09-01 (AP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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AP2011-65 |
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