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| Presentation | 2011-09-27 09:00 Case Studies on an FPGA with System-Level Multiprocessor Design Toolset Seiya Shibata, Yuki Ando, Shinya Honda (Nagoya Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroaki Takada (Nagoya Univ.)  RECONF2011-32 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper presents a system-level multiprocessor design toolkit: SystemBuilder. SystemBuilder enables system designers to design multiprocessor system on a chips (MPSoCs) and to explore the design space efficiently. In the system-level design, system designers start from describing the functionalities of embedded systems as processes and channels, and iterates mapping of them to hardware architectures and evaluation of them. Processes and channels represent concurrent computation components and communication among processes, respectively. SystemBuilder helps designers evaluate mappings of a system by automatically generating implementation of the mappings for an FPGA. In order to demonstrate efficiency of SystemBuilder, we show three case studies on system design on AES encryption, JPEG decoder and MPEG-4 decoder. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | System-Level Design / MPSoC / Embedded Systems / FPGA / Case Study / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 218, RECONF2011-32, pp. 57-62, Sept. 2011. | |
| Paper # | RECONF2011-32 | |
| Date of Issue | 2011-09-19 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | RECONF2011-32 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2011-09-26 - 2011-09-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Nagoya Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2011-09-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Case Studies on an FPGA with System-Level Multiprocessor Design Toolset |
| Sub Title (in English) | |
| Keyword(1) | System-Level Design |
| Keyword(2) | MPSoC |
| Keyword(3) | Embedded Systems |
| Keyword(4) | FPGA |
| Keyword(5) | Case Study |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Seiya Shibata |
| 1st Author's Affiliation | Nagoya University (Nagoya Univ.) |
| 2nd Author's Name | Yuki Ando |
| 2nd Author's Affiliation | Nagoya University (Nagoya Univ.) |
| 3rd Author's Name | Shinya Honda |
| 3rd Author's Affiliation | Nagoya University (Nagoya Univ.) |
| 4th Author's Name | Hiroyuki Tomiyama |
| 4th Author's Affiliation | Ritsumeikan University (Ritsumeikan Univ.) |
| 5th Author's Name | Hiroaki Takada |
| 5th Author's Affiliation | Nagoya University (Nagoya Univ.) |
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| Speaker | Author-1 |
| Date Time | 2011-09-27 09:00:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2011-32 |
| Volume (vol) | vol.111 |
| Number (no) | no.218 |
| Page | pp.57-62 |
| #Pages | 6 |
| Date of Issue | 2011-09-19 (RECONF) |
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