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Paper Abstract and Keywords
Presentation 2011-10-12 15:40
Development of Nb multi-layer Advanced Fabrication Process for Large-scale SFQ Circuits
Shuichi Nagasawa, Kenji Hinode, Tetsuro Satoh, Mutsuo Hidaka (ISTEC-SRL), Akira Fujimaki, Hiroyuki Akaike (Nagoya Uni.), Nobuyuki Yoshikawa (Yohohama National Uni.), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Uni.) SCE2011-18
Abstract (in Japanese) (See Japanese page) 
(in English) We have been developing a Nb multi-layer fabrication process for large-scale SFQ circuits. We have been evaluating both diagnostic chips and shift register chips to improve reliability of the fabrication process. The diagnostic chip was designed to evaluate the characteristics of the basic elements such as junctions, contacts, resisters, and wirings in addition to their defect evaluations. The shift register chip was designed to evaluate defects in real SFQ circuits and defects depending circuit size. We discuss a correlation of defects between the diagnostic chips and the shift register chips, and describe detail of the measurement results of the shift register chips to investigate the many possible causes of the problems and improving reliability in our fabrication process.
Keyword (in Japanese) (See Japanese page) 
(in English) SFQ circuit / Superconducting integrated circuit / Fabrication process / Multi-layer structure / Niobium / Shift register / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 230, SCE2011-18, pp. 37-42, Oct. 2011.
Paper # SCE2011-18 
Date of Issue 2011-10-05 (SCE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SCE  
Conference Date 2011-10-12 - 2011-10-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Fundamental Technologies for Superconducting Electronics, etc. 
Paper Information
Registration To SCE 
Conference Code 2011-10-SCE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Development of Nb multi-layer Advanced Fabrication Process for Large-scale SFQ Circuits 
Sub Title (in English)  
Keyword(1) SFQ circuit  
Keyword(2) Superconducting integrated circuit  
Keyword(3) Fabrication process  
Keyword(4) Multi-layer structure  
Keyword(5) Niobium  
Keyword(6) Shift register  
Keyword(7)  
Keyword(8)  
1st Author's Name Shuichi Nagasawa  
1st Author's Affiliation Superconductivity Research Laboratory (ISTEC-SRL)
2nd Author's Name Kenji Hinode  
2nd Author's Affiliation Superconductivity Research Laboratory (ISTEC-SRL)
3rd Author's Name Tetsuro Satoh  
3rd Author's Affiliation Superconductivity Research Laboratory (ISTEC-SRL)
4th Author's Name Mutsuo Hidaka  
4th Author's Affiliation Superconductivity Research Laboratory (ISTEC-SRL)
5th Author's Name Akira Fujimaki  
5th Author's Affiliation Nagoya University (Nagoya Uni.)
6th Author's Name Hiroyuki Akaike  
6th Author's Affiliation Nagoya University (Nagoya Uni.)
7th Author's Name Nobuyuki Yoshikawa  
7th Author's Affiliation Yokohama National University (Yohohama National Uni.)
8th Author's Name Kazuyoshi Takagi  
8th Author's Affiliation kyoto University (Kyoto Uni.)
9th Author's Name Naofumi Takagi  
9th Author's Affiliation kyoto University (Kyoto Uni.)
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Speaker Author-1 
Date Time 2011-10-12 15:40:00 
Presentation Time 25 minutes 
Registration for SCE 
Paper # SCE2011-18 
Volume (vol) vol.111 
Number (no) no.230 
Page pp.37-42 
#Pages 6 
Date of Issue 2011-10-05 (SCE) 

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