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| Presentation | 2011-11-29 09:50 Automatic Loop Fusion for High Level Synthesis using Outer Loop Shifting Yuta Kato, Kenshu Seto, Takuya Maruizumi (TCU)  VLD2011-69 DC2011-45 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | When designing hardware with high-level synthesis tools, it is often necessary to manually perform loop restructuring optimizations. Loop fusion is known to be one of the most effective techniques in such optimizations. Although many automatic loop fusion algorithms are proposed for parallel processors, such algorithms often generate loop structures which are not suitable for the hardware synthesis with high-level synthesis. In this paper, we extend the existing automatic loop fusion algorithm for multicores so that loop fusion is successful even for the input loops for which the previous loop fusion algorithm fails to fuse. We tested our approach for benchmark programs. With high-level synthesis, we performed loop pipelining to the fused loops, and found that the proposed technique (we named it outer loop shifting) generates pipelined hardware with up to 30\% less execution cycles than that by the previous loop fusion algorithm. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | polyhedral model / loop fusion / high level synthesis / loop pipelining / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 324, VLD2011-69, pp. 103-108, Nov. 2011. | |
| Paper # | VLD2011-69 | |
| Date of Issue | 2011-11-21 (VLD, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2011-69 DC2011-45 |
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| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2011-11-28 - 2011-11-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | NewWelCity Miyazaki |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2010 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2011-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Automatic Loop Fusion for High Level Synthesis using Outer Loop Shifting |
| Sub Title (in English) | |
| Keyword(1) | polyhedral model |
| Keyword(2) | loop fusion |
| Keyword(3) | high level synthesis |
| Keyword(4) | loop pipelining |
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| 1st Author's Name | Yuta Kato |
| 1st Author's Affiliation | Tokyo City University (TCU) |
| 2nd Author's Name | Kenshu Seto |
| 2nd Author's Affiliation | Tokyo City University (TCU) |
| 3rd Author's Name | Takuya Maruizumi |
| 3rd Author's Affiliation | Tokyo City University (TCU) |
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| Speaker | Author-1 |
| Date Time | 2011-11-29 09:50:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2011-69, DC2011-45 |
| Volume (vol) | vol.111 |
| Number (no) | no.324(VLD), no.325(DC) |
| Page | pp.103-108 |
| #Pages | 6 |
| Date of Issue | 2011-11-21 (VLD, DC) |
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