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Paper Abstract and Keywords
Presentation 2011-11-30 10:05
A 40nm 144mW VLSI Processor for Realtime 60k Word Continuous Speech Reconginion
Takanobu Sugahara, Guangji He, Tsuyoshi Fujinaga, Yuki Miyamoto, Hiroki Noguchi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) CPM2011-164 ICD2011-96
Abstract (in Japanese) (See Japanese page) 
(in English) We have developed a low power VLSI chip for 60k-word real-time continuous speech recognition based on HMM(Hidden Markov Model). Our implementation includes a cache architecture using the locality of speech recognition, beam pruning using dynamic threshold, two-stage language model searching highly parallel Gaussian Mixture Model (GMM) computation based on mixture level, Variable 50 frames look-ahead scheme and elastic pipeline operation between Viterbi transition and GMM processing. Results show that our implementation achieves 97.94% bandwidth reduction (70.86MB/s) and 78% required frequency reduction (126.5MHz) for 60k-word real-time continuous speech recognition. The test chip has been fabricated in 40nm CMOS technology and occupies 2.2mm × 2.5mm containing 1.9M transistors for logic and 7.8 Mbit on-chip memory. Measured data show 144mW power consumption at 126.5MHz and 1.1V.
Keyword (in Japanese) (See Japanese page) 
(in English) 40nm VLSI / Hidden Markov Model (HMM) / large vocabulary continuous speech recognition (LVCSR) / / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 327, ICD2011-96, pp. 79-84, Nov. 2011.
Paper # ICD2011-96 
Date of Issue 2011-11-21 (CPM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPM2011-164 ICD2011-96

Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2011-11-28 - 2011-11-30 
Place (in Japanese) (See Japanese page) 
Place (in English) NewWelCity Miyazaki 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2010 -New Field of VLSI Design- 
Paper Information
Registration To ICD 
Conference Code 2011-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 40nm 144mW VLSI Processor for Realtime 60k Word Continuous Speech Reconginion 
Sub Title (in English)  
Keyword(1) 40nm VLSI  
Keyword(2) Hidden Markov Model (HMM)  
Keyword(3) large vocabulary continuous speech recognition (LVCSR)  
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1st Author's Name Takanobu Sugahara  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Guangji He  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Tsuyoshi Fujinaga  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Yuki Miyamoto  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name Hiroki Noguchi  
5th Author's Affiliation Kobe University (Kobe Univ.)
6th Author's Name Shintaro Izumi  
6th Author's Affiliation Kobe University (Kobe Univ.)
7th Author's Name Hiroshi Kawaguchi  
7th Author's Affiliation Kobe University (Kobe Univ.)
8th Author's Name Masahiko Yoshimoto  
8th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2011-11-30 10:05:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # CPM2011-164, ICD2011-96 
Volume (vol) vol.111 
Number (no) no.326(CPM), no.327(ICD) 
Page pp.79-84 
#Pages 6 
Date of Issue 2011-11-21 (CPM, ICD) 

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