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Paper Abstract and Keywords
Presentation 2011-12-15 16:10
[Poster Presentation] Efficient Execution of Floating Point Instructions in CRIB
Naoaki Ohkubo, Kenji Kise (TokyoTech) ICD2011-113
Abstract (in Japanese) (See Japanese page) 
(in English) In recent high-performance processor, instruction scheduling, register renaming, and physical register file consume significant power. To solve this problem, the CRIB (Consolidated Rename, Issue, and Bypass) architecture is proposed. The CRIB has some constraints of dispatching instructions to the instruction window. Therefore in some cases, the efficiency of the window is reduced. From the evaluation, we confirmed that when the program runs a mix of floating-point operations and integer arithmetic instructions, these limitations significantly reduce the efficiency. This paper proposes a new configuration of the instruction window improving efficiency in these cases. Evaluation results of the simulation show that, while keeping a few percent lower IPC during execution of integer-only program, at most 40% higher IPC than conventional CRIB is confirmed during mixed-program executed.
Keyword (in Japanese) (See Japanese page) 
(in English) processor architecture / CRIB / in-place execution / / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 352, ICD2011-113, pp. 67-67, Dec. 2011.
Paper # ICD2011-113 
Date of Issue 2011-12-08 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD  
Conference Date 2011-12-15 - 2011-12-16 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
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Paper Information
Registration To ICD 
Conference Code 2011-12-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Efficient Execution of Floating Point Instructions in CRIB 
Sub Title (in English)  
Keyword(1) processor architecture  
Keyword(2) CRIB  
Keyword(3) in-place execution  
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1st Author's Name Naoaki Ohkubo  
1st Author's Affiliation Tokyo Institute of Technology (TokyoTech)
2nd Author's Name Kenji Kise  
2nd Author's Affiliation Tokyo Institute of Technology (TokyoTech)
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Speaker Author-1 
Date Time 2011-12-15 16:10:00 
Presentation Time 110 minutes 
Registration for ICD 
Paper # ICD2011-113 
Volume (vol) vol.111 
Number (no) no.352 
Page p.67 
#Pages 1 
Date of Issue 2011-12-08 (ICD) 

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