講演抄録/キーワード |
講演名 |
2011-12-15 10:30
An Inductorless Phase-Locked Loop with Pulse Injection Locking Technique in 90 nm CMOS ○Sang-Yeop Lee・Hiroyuki Ito・Noboru Ishihara・Kazuya Masu(Tokyo Inst. of Tech.) ICD2011-100 エレソ技報アーカイブへのリンク:ICD2011-100 |
抄録 |
(和) |
An inductorless phase-locked loop with subharmonic pulse injection locking was realized (PLL area: 0.08 $\mathrm{mm}^2$) by adopting 90 nm Si CMOS technology. In the proposed PLL, a phase-locked loop is implemented to ensure correct frequency locking. Final phase locking is done by injection locking to reduce phase noise.
For a 300-MHz input reference signal, without injection locking, the 1-MHz-offset phase noise was $-$91.4 dBc/Hz (PLL output frequency: 7.2 GHz $=24\times 300$ MHz); with injection locking, the noise was $-$107 dBc/Hz (spurious level: $-$32 dBc; power consumption from a 1.0 V power supply: 13.6 mW). |
(英) |
An inductorless phase-locked loop with subharmonic pulse injection locking was realized (PLL area: 0.08 $\mathrm{mm}^2$) by adopting 90 nm Si CMOS technology. In the proposed PLL, a phase-locked loop is implemented to ensure correct frequency locking. Final phase locking is done by injection locking to reduce phase noise.
For a 300-MHz input reference signal, without injection locking, the 1-MHz-offset phase noise was $-$91.4 dBc/Hz (PLL output frequency: 7.2 GHz $=24\times 300$ MHz); with injection locking, the noise was $-$107 dBc/Hz (spurious level: $-$32 dBc; power consumption from a 1.0 V power supply: 13.6 mW). |
キーワード |
(和) |
injection locking / phase-locked loop / ring oscillator / CMOS / / / / |
(英) |
injection locking / phase-locked loop / ring oscillator / CMOS / / / / |
文献情報 |
信学技報, vol. 111, no. 352, ICD2011-100, pp. 1-6, 2011年12月. |
資料番号 |
ICD2011-100 |
発行日 |
2011-12-08 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
PDFダウンロード |
ICD2011-100 エレソ技報アーカイブへのリンク:ICD2011-100 |