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Paper Abstract and Keywords
Presentation 2011-12-16 10:50
Hierarchal Predefine Codebook based Image Enlargement and Its FPGA Implementation
Hakaru Tamukoh (TUAT), Hideaki Kawano (KIT), Noriaki Suetake (Yamaguchi Univ.), Masatoshi Sekine (TUAT), Byungki Cha, Takashi Aso (KIIS) SIS2011-51
Abstract (in Japanese) (See Japanese page) 
(in English) The codebook based method, which consists of a relationship of high- and low-frequency image components,
achieves a high-quality image enlargement with high-frequency component augmentation.
However, a codebook search process takes too much calculation time and it is not appropriate for a real-time application such as a moving image enlargement.
To solve this problem, we propose a hierarchical predefined codebook to reduce the calculation cost
and design a massively parallel and pipelined digital hardware architecture to realize the real-time codebook search.
Simulation results show that the proposed method is 40 times faster than the ordinary method, and its FPGA implementation achieves a performance of around 54 fps for VGA size image enlargement.
Keyword (in Japanese) (See Japanese page) 
(in English) Image Enlargement / Codebook / FPGA / / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 342, SIS2011-51, pp. 63-67, Dec. 2011.
Paper # SIS2011-51 
Date of Issue 2011-12-08 (SIS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SIS  
Conference Date 2011-12-15 - 2011-12-16 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SIS 
Conference Code 2011-12-SIS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Hierarchal Predefine Codebook based Image Enlargement and Its FPGA Implementation 
Sub Title (in English)  
Keyword(1) Image Enlargement  
Keyword(2) Codebook  
Keyword(3) FPGA  
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1st Author's Name Hakaru Tamukoh  
1st Author's Affiliation Tokyo university of agricluture and techology (TUAT)
2nd Author's Name Hideaki Kawano  
2nd Author's Affiliation Kyushu Institute of Technology (KIT)
3rd Author's Name Noriaki Suetake  
3rd Author's Affiliation Yamaguchi University (Yamaguchi Univ.)
4th Author's Name Masatoshi Sekine  
4th Author's Affiliation Tokyo university of agricluture and techology (TUAT)
5th Author's Name Byungki Cha  
5th Author's Affiliation Kyushu Institute of Information Sciences (KIIS)
6th Author's Name Takashi Aso  
6th Author's Affiliation Kyushu Institute of Information Sciences (KIIS)
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Speaker Author-1 
Date Time 2011-12-16 10:50:00 
Presentation Time 25 minutes 
Registration for SIS 
Paper # SIS2011-51 
Volume (vol) vol.111 
Number (no) no.342 
Page pp.63-67 
#Pages
Date of Issue 2011-12-08 (SIS) 


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