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| Presentation | 2012-01-25 16:20 A Fast Approximate Solution of Energy Efficient Network Topology Using Reconfigurable Processor, STP Akiko Hirao, Hidetoshi Takeshita, Haruka Yonezu, Satoru Okamoto, Naoaki Yamanaka (Keio Univ.)  VLD2011-102 CPSY2011-65 RECONF2011-61 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Recently, the Internet is necessary tool for our daily lives, and the number of the Internet users is increasing particularly quickly. Reflecting this trend, the amount of traffic and power consumption of network is increasing. To save the energy of network is a critical issue. One of the concepts of saving the energy is to realize a low power consumption network by aggregating traffic into specific links and powering off interfaces of routers/switches that do not carry traffic. However, a calculation method of this algorithm takes a lot of time to deal with a large network topology. In this paper, we propose a platform that processes the calculation of energy efficient topology rapidly using reconfigurable processor, STP. We use this reconfigurable device for calculation of the link utilization, it takes a lot of time of whole process of this algorithm. We show the possibility that our proposal can execute arithmetic processing faster than a usual software. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Energy saving / Reconfigurable processor / Fast approximate solution / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 399, RECONF2011-61, pp. 67-72, Jan. 2012. | |
| Paper # | RECONF2011-61 | |
| Date of Issue | 2012-01-18 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2011-102 CPSY2011-65 RECONF2011-61 |
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| Conference Information | |
| Committee | VLD CPSY RECONF IPSJ-SLDM |
| Conference Date | 2012-01-25 - 2012-01-26 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2012-01-VLD-CPSY-RECONF-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Fast Approximate Solution of Energy Efficient Network Topology Using Reconfigurable Processor, STP |
| Sub Title (in English) | |
| Keyword(1) | Energy saving |
| Keyword(2) | Reconfigurable processor |
| Keyword(3) | Fast approximate solution |
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| 1st Author's Name | Akiko Hirao |
| 1st Author's Affiliation | Keio University (Keio Univ.) |
| 2nd Author's Name | Hidetoshi Takeshita |
| 2nd Author's Affiliation | Keio University (Keio Univ.) |
| 3rd Author's Name | Haruka Yonezu |
| 3rd Author's Affiliation | Keio University (Keio Univ.) |
| 4th Author's Name | Satoru Okamoto |
| 4th Author's Affiliation | Keio University (Keio Univ.) |
| 5th Author's Name | Naoaki Yamanaka |
| 5th Author's Affiliation | Keio University (Keio Univ.) |
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| Speaker | Author-1 |
| Date Time | 2012-01-25 16:20:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | VLD2011-102, CPSY2011-65, RECONF2011-61 |
| Volume (vol) | vol.111 |
| Number (no) | no.397(VLD), no.398(CPSY), no.399(RECONF) |
| Page | pp.67-72 |
| #Pages | 6 |
| Date of Issue | 2012-01-18 (VLD, CPSY, RECONF) |
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