| Paper Abstract and Keywords |
| Presentation |
2012-01-27 16:55
[Special Talk]
Noise Reduction Techniques in Power Electronics Circuits Masahito Shoyama (Kyushu Univ.) EMCJ2011-131 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
In power electronics circuits, because switching elements repeat an on/off action at very high frequency, there is a possibility to generate a large switching noise and to become a factor of malfunction of electronic devices. Although a noise filter, a snubber element, etc. were post-installed in the main electronic circuit and the measure to suppress a noise was performed conventionally, the increase in size or weight and the cost rise were caused, and the trial-and-error measure had taken great time.
This paper reports some noise reduction techniques severed from origin with new topologies of main power electronic circuits taking switching supplies as examples. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Power Electronics Circuits / Switching Noise / Noise Reduction / Circuit Topology / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 111, no. 420, EMCJ2011-131, pp. 117-122, Jan. 2012. |
| Paper # |
EMCJ2011-131 |
| Date of Issue |
2012-01-20 (EMCJ) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
EMCJ2011-131 |
| Conference Information |
| Committee |
EMCJ |
| Conference Date |
2012-01-27 - 2012-01-27 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kyushu Univ. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Communication, EMC, etc. |
| Paper Information |
| Registration To |
EMCJ |
| Conference Code |
2012-01-EMCJ |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Noise Reduction Techniques in Power Electronics Circuits |
| Sub Title (in English) |
|
| Keyword(1) |
Power Electronics Circuits |
| Keyword(2) |
Switching Noise |
| Keyword(3) |
Noise Reduction |
| Keyword(4) |
Circuit Topology |
| Keyword(5) |
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| Keyword(6) |
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| 1st Author's Name |
Masahito Shoyama |
| 1st Author's Affiliation |
Kyushu University (Kyushu Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2012-01-27 16:55:00 |
| Presentation Time |
45 minutes |
| Registration for |
EMCJ |
| Paper # |
EMCJ2011-131 |
| Volume (vol) |
vol.111 |
| Number (no) |
no.420 |
| Page |
pp.117-122 |
| #Pages |
6 |
| Date of Issue |
2012-01-20 (EMCJ) |