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Paper Abstract and Keywords
Presentation 2012-05-30 15:20
Write Control Method Based on State Transition for Magnetic Flip-Flop
Naoya Okada (Waseda Univ.), Yuichi Nakamura (NEC), Shinji Kimura (Waseda Univ.) VLD2012-3
Abstract (in Japanese) (See Japanese page) 
(in English) In this manuscript, we propose a write control method for nonvolatile MFF(Magnetic Flip--Flop). MFF enables leakage power reduction in the logic circuits and quick return from standby mode. However, it consumes about 10 times power as large as conventional DFF during the write operation. So, it is desirable to reduce redundant write operations. We focus on the state transition of sequential circuit to detect them. If the next state and outputs do not depend on some current bit, the bit is redundant and unnecessary to write. We propose a method to detect such bits. Our method can be combined with a reduction method based on the EXOR of the current value and the new value. When applying combined method to several benchmark circuits, up to 15.3 % power reduction can be achieved with the area over head of 1.9% $\sim$ 4.8% compared with only the EXOR based method.
Keyword (in Japanese) (See Japanese page) 
(in English) Magnetic flip-flop / Clock gating / State transition / / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 71, VLD2012-3, pp. 13-18, May 2012.
Paper # VLD2012-3 
Date of Issue 2012-05-23 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2012-3

Conference Information
Committee IPSJ-SLDM VLD  
Conference Date 2012-05-30 - 2012-05-31 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitakyushu International Conference Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) System Design, etc. 
Paper Information
Registration To VLD 
Conference Code 2012-05-SLDM-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Write Control Method Based on State Transition for Magnetic Flip-Flop 
Sub Title (in English)  
Keyword(1) Magnetic flip-flop  
Keyword(2) Clock gating  
Keyword(3) State transition  
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1st Author's Name Naoya Okada  
1st Author's Affiliation Waseda University (Waseda Univ.)
2nd Author's Name Yuichi Nakamura  
2nd Author's Affiliation NEC Corporation (NEC)
3rd Author's Name Shinji Kimura  
3rd Author's Affiliation Waseda University (Waseda Univ.)
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Speaker Author-1 
Date Time 2012-05-30 15:20:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2012-3 
Volume (vol) vol.112 
Number (no) no.71 
Page pp.13-18 
#Pages 6 
Date of Issue 2012-05-23 (VLD) 

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