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Paper Abstract and Keywords
Presentation 2012-10-25 15:30
Electromagnetic Simulation of Radiation Efficiency for On-Chip Dipole/Loop/Patch Antennas on a Si CMOS Substrate
Takuichi Hirano, Kenichi Okada, Jiro Hirokawa, Makoto Ando (TokyoTech) EMCJ2012-73 EST2012-57
Abstract (in Japanese) (See Japanese page) 
(in English) Electromagnetic simulation of radiation efficiency for on-chip dipole, loop and patch antennas were performed. It was confirmed that the equivalent material property of a well layer can be expressed with uniform material with conductivity of 10^5 S/m and thickness of 1 um. It was also found that high radiation efficiency can be obtained when the conductivity of a silicon substrate is smaller than 0.1 S/m, or resistivity of 1 kOhm cm. The conductor loss is dominant in a patch antenna, and it can be neglected when the height between a patch and ground plane is larger than 100 um.
Keyword (in Japanese) (See Japanese page) 
(in English) Si CMOS / Millimeter-wave / On-chip antenna / Dipole antenna / Loop antenna / Patch antenna / Radiation efficiency / Electromagnetic simulation  
Reference Info. IEICE Tech. Rep., vol. 112, no. 257, EST2012-57, pp. 55-60, Oct. 2012.
Paper # EST2012-57 
Date of Issue 2012-10-18 (EMCJ, EST) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EMCJ2012-73 EST2012-57

Conference Information
Committee EST EMCJ IEE-EMC  
Conference Date 2012-10-25 - 2012-10-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku Gakuin University(Tagajo Campus) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Simulation technology, EMC, etc. 
Paper Information
Registration To EST 
Conference Code 2012-10-EST-EMCJ-EMC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Electromagnetic Simulation of Radiation Efficiency for On-Chip Dipole/Loop/Patch Antennas on a Si CMOS Substrate 
Sub Title (in English)  
Keyword(1) Si CMOS  
Keyword(2) Millimeter-wave  
Keyword(3) On-chip antenna  
Keyword(4) Dipole antenna  
Keyword(5) Loop antenna  
Keyword(6) Patch antenna  
Keyword(7) Radiation efficiency  
Keyword(8) Electromagnetic simulation  
1st Author's Name Takuichi Hirano  
1st Author's Affiliation Tokyo Institute of Technology (TokyoTech)
2nd Author's Name Kenichi Okada  
2nd Author's Affiliation Tokyo Institute of Technology (TokyoTech)
3rd Author's Name Jiro Hirokawa  
3rd Author's Affiliation Tokyo Institute of Technology (TokyoTech)
4th Author's Name Makoto Ando  
4th Author's Affiliation Tokyo Institute of Technology (TokyoTech)
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Speaker Author-1 
Date Time 2012-10-25 15:30:00 
Presentation Time 25 minutes 
Registration for EST 
Paper # EMCJ2012-73, EST2012-57 
Volume (vol) vol.112 
Number (no) no.256(EMCJ), no.257(EST) 
Page pp.55-60 
#Pages 6 
Date of Issue 2012-10-18 (EMCJ, EST) 

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