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| Presentation | 2013-01-16 10:00 A Study of 3D FPGA Architecture Using Face-to-Face Stacked Routing Layer Yusuke Iwai, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)  VLD2012-109 CPSY2012-58 RECONF2012-63 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | 3D LSIs promise More than Moore integration by packing a great deal of functionality on a chip, while improving performance and reducing costs. We have developed 3D-FPGAs which has two separate layers which is both logic parts and routing parts, respectively. In this paper we propose channel width exploring methods for our 3D-FPGA and evaluation execute compare with traditional 2D-FPGA architecture. As the results of evaluation, proposed 3D-FPGA is 24\% less area and 27\% faster delay than 2D-FPGA on average. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / 3D-LSI / routing architecture / microbump / Face to Face stack / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 377, RECONF2012-63, pp. 13-18, Jan. 2013. | |
| Paper # | RECONF2012-63 | |
| Date of Issue | 2013-01-09 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2012-109 CPSY2012-58 RECONF2012-63 |
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| Conference Information | |
| Committee | CPSY VLD RECONF IPSJ-SLDM |
| Conference Date | 2013-01-16 - 2013-01-17 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2013-01-CPSY-VLD-RECONF-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study of 3D FPGA Architecture Using Face-to-Face Stacked Routing Layer |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | 3D-LSI |
| Keyword(3) | routing architecture |
| Keyword(4) | microbump |
| Keyword(5) | Face to Face stack |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yusuke Iwai |
| 1st Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 2nd Author's Name | Qian Zhao |
| 2nd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 3rd Author's Name | Motoki Amagasaki |
| 3rd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 4th Author's Name | Masahiro Iida |
| 4th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 5th Author's Name | Morihiro Kuga |
| 5th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 6th Author's Name | Toshinori Sueyoshi |
| 6th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
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| Speaker | Author-1 |
| Date Time | 2013-01-16 10:00:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | VLD2012-109, CPSY2012-58, RECONF2012-63 |
| Volume (vol) | vol.112 |
| Number (no) | no.375(VLD), no.376(CPSY), no.377(RECONF) |
| Page | pp.13-18 |
| #Pages | 6 |
| Date of Issue | 2013-01-09 (VLD, CPSY, RECONF) |
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