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| Presentation | 2013-03-08 11:20 Software Implementation Using Quadruple-Rail Representation Against Power Analysis Tomoyasu Suzaki, Akira Maekawa, Kazuhiko Minematsu, Toshihiko Okamura (NEC)  IT2012-95 ISEC2012-113 WBS2012-81 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Power analysis is an attack against a crypto device that extracts the secret key by using the relation between the power consumption and the humming-weight of the register. Hoogvorst et al. proposed a software-based protection method using the dual-rail data representation, which simulates a hardware-based protection called Dual-Rail with Precharge Logic (DPL). Since this method needs the lookup tables to implement all logical instructions, the performance is severely limited. In this paper, we propose a software-based protection using a quadruple-rail data representation. This method achieves a faster operation by implementing the exclusive-or instruction without using a lookup table. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | side-channel attack / software / Quadruple-Rail representation / hamming weight / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 461, ISEC2012-113, pp. 211-216, March 2013. | |
| Paper # | ISEC2012-113 | |
| Date of Issue | 2013-02-28 (IT, ISEC, WBS) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | IT2012-95 ISEC2012-113 WBS2012-81 |
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| Conference Information | |
| Committee | IT ISEC WBS |
| Conference Date | 2013-03-07 - 2013-03-08 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kwansei Gakuin Univ., Osaka-Umeda Campus |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | joint meeting of IT, ISEC, and WBS |
| Paper Information | |
| Registration To | ISEC |
| Conference Code | 2013-03-IT-ISEC-WBS |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Software Implementation Using Quadruple-Rail Representation Against Power Analysis |
| Sub Title (in English) | |
| Keyword(1) | side-channel attack |
| Keyword(2) | software |
| Keyword(3) | Quadruple-Rail representation |
| Keyword(4) | hamming weight |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Tomoyasu Suzaki |
| 1st Author's Affiliation | NEC Corporation (NEC) |
| 2nd Author's Name | Akira Maekawa |
| 2nd Author's Affiliation | NEC Corporation (NEC) |
| 3rd Author's Name | Kazuhiko Minematsu |
| 3rd Author's Affiliation | NEC Corporation (NEC) |
| 4th Author's Name | Toshihiko Okamura |
| 4th Author's Affiliation | NEC Corporation (NEC) |
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| Speaker | Author-1 |
| Date Time | 2013-03-08 11:20:00 |
| Presentation Time | 25 minutes |
| Registration for | ISEC |
| Paper # | IT2012-95, ISEC2012-113, WBS2012-81 |
| Volume (vol) | vol.112 |
| Number (no) | no.460(IT), no.461(ISEC), no.462(WBS) |
| Page | pp.211-216 |
| #Pages | 6 |
| Date of Issue | 2013-02-28 (IT, ISEC, WBS) |
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