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Paper Abstract and Keywords
Presentation 2013-03-14 08:45
Power optimization of micro-controller with Sillicon on Thin Buried Oxide
Kuniaki Kitamori, Weihan Wang, Hongliang Su, Hideharu Amano (Keio Univ.) CPSY2012-85 DC2012-91
Abstract (in Japanese) (See Japanese page) 
(in English) Nowadays, from battery supplied mobile devices to supercomputers, reducing the power consumption has become a serious design issue.
Although using low power supply is the most efficient way to reduce
the power, it also increases the leakage power and delay varience.
Low-power Electronics Association \& Project (LEAP) developed
Silicon On Thin Buried Oxide (SOTB) technology in order to solve those
problems. Since the SOTB employs fully depleted
silicon-on-insulator (FD-SOI) CMOSFET, not only floating-body effects
but also bias of threshold voltage can be suppressed. In order to verify
the SOTB technology, we have applied to Automotive microcontroller
V850E-Star. In this paper, we used 40 kinds of reverse bias and forward
bias in evaluation of a microcontroller and computed the optimal
electric power. V850E-Star works with 33MHz operating frequency and 0.4V
operating voltage. The evaluation results that leak of Standby mode,
which reduce the leak maximux, was reduced by 92\% from the Balance
mode.
Keyword (in Japanese) (See Japanese page) 
(in English) Sillicon on Thin Buried Oxide CMOSFET / V850E-Star / low $V_{dd}$ / low power consumption / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 481, CPSY2012-85, pp. 199-204, March 2013.
Paper # CPSY2012-85 
Date of Issue 2013-03-06 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2012-85 DC2012-91

Conference Information
Committee CPSY DC IPSJ-SLDM IPSJ-EMB  
Conference Date 2013-03-13 - 2013-03-14 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CPSY 
Conference Code 2013-03-CPSY-DC-SLDM-EMB 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Power optimization of micro-controller with Sillicon on Thin Buried Oxide 
Sub Title (in English)  
Keyword(1) Sillicon on Thin Buried Oxide CMOSFET  
Keyword(2) V850E-Star  
Keyword(3) low $V_{dd}$  
Keyword(4) low power consumption  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Kuniaki Kitamori  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Weihan Wang  
2nd Author's Affiliation Keio University (Keio Univ.)
3rd Author's Name Hongliang Su  
3rd Author's Affiliation Keio University (Keio Univ.)
4th Author's Name Hideharu Amano  
4th Author's Affiliation Keio University (Keio Univ.)
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Speaker Author-1 
Date Time 2013-03-14 08:45:00 
Presentation Time 25 minutes 
Registration for CPSY 
Paper # CPSY2012-85, DC2012-91 
Volume (vol) vol.112 
Number (no) no.481(CPSY), no.482(DC) 
Page pp.199-204 
#Pages 6 
Date of Issue 2013-03-06 (CPSY, DC) 

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