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Paper Abstract and Keywords
Presentation 2013-04-11 13:30
[Invited Talk] Restructuring of Memory Hierarchy in Computing System with Spintronics-Based Technologies
Tetsuo Endoh (Tohoku Univ.) ICD2013-5
Abstract (in Japanese) (See Japanese page) 
(in English) In the memory hierarchy of current computer systems, the trade-off between their performance and power consumption is becoming more serious. In order to overcome this issue and to achieve both low power and high performance, it is effective to restructure the memory hierarchy. This paper discusses the novel memory system, which utilizes nonvolatile (NV) memory and logic circuits with spin-transfer-torque (STT) devices. For cache memories, an NV SRAM, which includes 4T-2MTJ memory cell, is developed. For main memories, a PFET-based 1T-1MTJ STT-RAM together with a new high-resolution sense amplifier is proposed. For core logic circuits, a flip-flop circuit using a newly developed NV-latch circuit is also proposed, which demonstrates 600MHz operation, the world's fastest speed in NV-circuits.
Keyword (in Japanese) (See Japanese page) 
(in English) Memory Hierarchy / Computer System / Spintronics / Circuits / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 1, ICD2013-5, pp. 21-26, April 2013.
Paper # ICD2013-5 
Date of Issue 2013-04-04 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD  
Conference Date 2013-04-11 - 2013-04-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Advanced Industrial Science and Technology (AIST) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2013-04-ICD 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Restructuring of Memory Hierarchy in Computing System with Spintronics-Based Technologies 
Sub Title (in English)  
Keyword(1) Memory Hierarchy  
Keyword(2) Computer System  
Keyword(3) Spintronics  
Keyword(4) Circuits  
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1st Author's Name Tetsuo Endoh  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2013-04-11 13:30:00 
Presentation Time 50 minutes 
Registration for ICD 
Paper # ICD2013-5 
Volume (vol) vol.113 
Number (no) no.1 
Page pp.21-26 
#Pages 6 
Date of Issue 2013-04-04 (ICD) 

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