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Paper Abstract and Keywords
Presentation 2013-09-27 14:00
LSI Implementation of a Secure Low-Power CSSAL Cellular Multiplier
Cancio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.) CAS2013-52 NLP2013-64
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, a secure and low-power charge-sharing symmetric adiabatic logic cellular multiplier over GF(2^4) implemented in LSI using 0.18um CMOS process is presented. The verification of the logic functionality and the operating speed of the implemented LSI in adiabatic switching technique will be discussed. The correlation of LSI output logic function and the supply current trace are measured in order to analyze the current-to-data dependency in respect to the given input transitions. Maximum power clock frequency for chip measurement is 5 MHz, whereas the post-layout simulation is up to 50 MHz and the pre-layout simulation reaches 125 MHz using the same individual logic.
Keyword (in Japanese) (See Japanese page) 
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Reference Info. IEICE Tech. Rep., vol. 113, no. 224, CAS2013-52, pp. 89-94, Sept. 2013.
Paper # CAS2013-52 
Date of Issue 2013-09-19 (CAS, NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2013-52 NLP2013-64

Conference Information
Committee CAS NLP  
Conference Date 2013-09-26 - 2013-09-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Satellite Campus, Gifu University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) General 
Paper Information
Registration To CAS 
Conference Code 2013-09-CAS-NLP 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) LSI Implementation of a Secure Low-Power CSSAL Cellular Multiplier 
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1st Author's Name Cancio Monteiro  
1st Author's Affiliation Gifu University (Gifu Univ.)
2nd Author's Name Yasuhiro Takahashi  
2nd Author's Affiliation Gifu University (Gifu Univ.)
3rd Author's Name Toshikazu Sekine  
3rd Author's Affiliation Gifu University (Gifu Univ.)
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Speaker Author-1 
Date Time 2013-09-27 14:00:00 
Presentation Time 25 minutes 
Registration for CAS 
Paper # CAS2013-52, NLP2013-64 
Volume (vol) vol.113 
Number (no) no.224(CAS), no.225(NLP) 
Page pp.89-94 
#Pages 6 
Date of Issue 2013-09-19 (CAS, NLP) 

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