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Paper Abstract and Keywords
Presentation 2013-11-28 10:25
Automatic synthesis of the inter-processor communication implimentation for hetero multiprocessor systems
Yukihito Ishida, Yuki Ando, Shinya Honda, Hiroaki Takada, Masato Edahiro (Nagoya Univ.) RECONF2013-50
Abstract (in Japanese) (See Japanese page) 
(in English) This paper introduces an automatic synthesis technique of inter-processor communication for System-on-chip with heterogeneous multiprocessors.Along with the increase in the use of heterogeneous multiprocessors such as FPGAs with processor cores, the cost for design and implement of the inter-processor communication becomes a problem.Focusing on that typical heterogeneous multiprocessors have inter-processor interrupts and shared memories, we propose an implementation of inter-processor communication using them.In order to increase the design efficiency, we also propose a method that automatically generates the inter-processor communication for target systems.The case study shows that automatically generated inter-processor communication exactly runs on the system with heterogeneous multiprocessors.
Keyword (in Japanese) (See Japanese page) 
(in English) heterogenious / multiprocessor / inter-processor communication / FPGA / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 325, RECONF2013-50, pp. 63-68, Nov. 2013.
Paper # RECONF2013-50 
Date of Issue 2013-11-20 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2013-50

Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2013-11-27 - 2013-11-29 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2013 -New Field of VLSI Design- 
Paper Information
Registration To RECONF 
Conference Code 2013-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Automatic synthesis of the inter-processor communication implimentation for hetero multiprocessor systems 
Sub Title (in English)  
Keyword(1) heterogenious  
Keyword(2) multiprocessor  
Keyword(3) inter-processor communication  
Keyword(4) FPGA  
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1st Author's Name Yukihito Ishida  
1st Author's Affiliation Nagoya University (Nagoya Univ.)
2nd Author's Name Yuki Ando  
2nd Author's Affiliation Nagoya University (Nagoya Univ.)
3rd Author's Name Shinya Honda  
3rd Author's Affiliation Nagoya University (Nagoya Univ.)
4th Author's Name Hiroaki Takada  
4th Author's Affiliation Nagoya University (Nagoya Univ.)
5th Author's Name Masato Edahiro  
5th Author's Affiliation Nagoya University (Nagoya Univ.)
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Speaker Author-1 
Date Time 2013-11-28 10:25:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2013-50 
Volume (vol) vol.113 
Number (no) no.325 
Page pp.63-68 
#Pages 6 
Date of Issue 2013-11-20 (RECONF) 

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