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Paper Abstract and Keywords
Presentation 2014-01-28 17:45
A study on module allocation in multi-FPGA systems
Yusuke Hirai, Kazuaki Nakazato (Univ. of the Ryukyus), Mohamed Sofian bin Abu Talip, Mishra Dipikarani, Hideharu Amano (Keio Univ.), Naoyuki Fujita (JAXA), Yasunori Osana (Univ. of the Ryukyus) VLD2013-118 CPSY2013-89 RECONF2013-72
Abstract (in Japanese) (See Japanese page) 
(in English) Computational fluid dynamics (CFD), a powerful tool for aircraft
design and other mechanical designs is a major application in
computational science. Since CFD is a CPU intensive application,
several challenges have made to accelerate the computation with
FPGA. In this report, a method to divide and place a large dataflow of
numerical pipeline onto an FPGA array, such as FLOPS-2D. This method
reduces the communication bottleneck by optimizing the placement with
simulated annealing. Pipelines for Roe average and MUSCL is placed
on FPGA arrays on $2times 2$ or $4times 4$ by the proposed method,
and the effective results have been obtained.
Keyword (in Japanese) (See Japanese page) 
(in English) Multi-FPGA system / Simulated Annealing / Placement optimization / CFD / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 418, RECONF2013-72, pp. 97-102, Jan. 2014.
Paper # RECONF2013-72 
Date of Issue 2014-01-21 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2013-118 CPSY2013-89 RECONF2013-72

Conference Information
Committee IPSJ-SLDM CPSY RECONF VLD  
Conference Date 2014-01-28 - 2014-01-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To RECONF 
Conference Code 2014-01-SLDM-CPSY-RECONF-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A study on module allocation in multi-FPGA systems 
Sub Title (in English)  
Keyword(1) Multi-FPGA system  
Keyword(2) Simulated Annealing  
Keyword(3) Placement optimization  
Keyword(4) CFD  
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Keyword(6)  
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1st Author's Name Yusuke Hirai  
1st Author's Affiliation University of the Ryukyus (Univ. of the Ryukyus)
2nd Author's Name Kazuaki Nakazato  
2nd Author's Affiliation University of the Ryukyus (Univ. of the Ryukyus)
3rd Author's Name Mohamed Sofian bin Abu Talip  
3rd Author's Affiliation Keio University (Keio Univ.)
4th Author's Name Mishra Dipikarani  
4th Author's Affiliation Keio University (Keio Univ.)
5th Author's Name Hideharu Amano  
5th Author's Affiliation Keio University (Keio Univ.)
6th Author's Name Naoyuki Fujita  
6th Author's Affiliation Japan Aerospace Exploration Agency (JAXA)
7th Author's Name Yasunori Osana  
7th Author's Affiliation University of the Ryukyus (Univ. of the Ryukyus)
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Speaker Author-1 
Date Time 2014-01-28 17:45:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # VLD2013-118, CPSY2013-89, RECONF2013-72 
Volume (vol) vol.113 
Number (no) no.416(VLD), no.417(CPSY), no.418(RECONF) 
Page pp.97-102 
#Pages 6 
Date of Issue 2014-01-21 (VLD, CPSY, RECONF) 

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