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Paper Abstract and Keywords
Presentation 2014-01-28 16:30
A 3D FPGA-Array "Vocalise" and its communication system.
Yusuke Atsumari, Jiang Li, Hiromasa Kubo, Akihiro Sorimachi, Baku Ogasawara, Masatoshi Sekine (TUAT) VLD2013-115 CPSY2013-86 RECONF2013-69
Abstract (in Japanese) (See Japanese page) 
(in English) We have developed a 10cm square card with a three-dimensional I/O that installed a 4 million system gate scale FPGA and have already confirmed its basic operation. We are building a High Performance Computing (HPC) system constituted by connecting the card in the shape of a three-dimensional array. We called that HPC system as a Virtual Object by Configurable Array of Little Scalable Engine (Vocalise).In this report, the communication, control and configuration of this HPC system is described.In addition, we propose and implement card-to-card communication methods within this system, and show its usefulness.
Keyword (in Japanese) (See Japanese page) 
(in English) Vocalise / FPGA-Array / Reconfigurable HPC / / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 418, RECONF2013-69, pp. 79-84, Jan. 2014.
Paper # RECONF2013-69 
Date of Issue 2014-01-21 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2013-115 CPSY2013-86 RECONF2013-69

Conference Information
Committee IPSJ-SLDM CPSY RECONF VLD  
Conference Date 2014-01-28 - 2014-01-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To RECONF 
Conference Code 2014-01-SLDM-CPSY-RECONF-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 3D FPGA-Array "Vocalise" and its communication system. 
Sub Title (in English)  
Keyword(1) Vocalise  
Keyword(2) FPGA-Array  
Keyword(3) Reconfigurable HPC  
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1st Author's Name Yusuke Atsumari  
1st Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
2nd Author's Name Jiang Li  
2nd Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
3rd Author's Name Hiromasa Kubo  
3rd Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
4th Author's Name Akihiro Sorimachi  
4th Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
5th Author's Name Baku Ogasawara  
5th Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
6th Author's Name Masatoshi Sekine  
6th Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
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Speaker Author-1 
Date Time 2014-01-28 16:30:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # VLD2013-115, CPSY2013-86, RECONF2013-69 
Volume (vol) vol.113 
Number (no) no.416(VLD), no.417(CPSY), no.418(RECONF) 
Page pp.79-84 
#Pages 6 
Date of Issue 2014-01-21 (VLD, CPSY, RECONF) 

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