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| Presentation | 2014-01-28 09:20 Artificial Intelligence of Blokus Duo on FPGA Using Cyber Work Bench Naru Sugimoto, Takaaki Miyajima, Takuya Kuhara, Takuji Mitsuishi, Hideharu Amano (Keio Univ.)  VLD2013-104 CPSY2013-75 RECONF2013-58 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper presents a design of an FPGA-based Blokus Duo solver. It searches a game tree by using the miniMax algorithm with alpha-beta pruning. In addition, HLS tool called CyberWorkBench (CWB) is used to implement hardware. By making the use of functions in CWB, parallel fully pipelined design is generated. The implemented solver works at 100MHz with Xilinx Spartan-6 XC6SLX45 FPGA on the Digilent Atlys board. It can search states after three moves in most cases. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | High Level Synthesis / Cyber Work Bench / FPGA / Blokus Duo / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 113, no. 418, RECONF2013-58, pp. 13-18, Jan. 2014. | |
| Paper # | RECONF2013-58 | |
| Date of Issue | 2014-01-21 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2013-104 CPSY2013-75 RECONF2013-58 |
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| Conference Information | |
| Committee | IPSJ-SLDM CPSY RECONF VLD |
| Conference Date | 2014-01-28 - 2014-01-29 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2014-01-SLDM-CPSY-RECONF-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Artificial Intelligence of Blokus Duo on FPGA Using Cyber Work Bench |
| Sub Title (in English) | |
| Keyword(1) | High Level Synthesis |
| Keyword(2) | Cyber Work Bench |
| Keyword(3) | FPGA |
| Keyword(4) | Blokus Duo |
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| 1st Author's Name | Naru Sugimoto |
| 1st Author's Affiliation | Keio University (Keio Univ.) |
| 2nd Author's Name | Takaaki Miyajima |
| 2nd Author's Affiliation | Keio University (Keio Univ.) |
| 3rd Author's Name | Takuya Kuhara |
| 3rd Author's Affiliation | Keio University (Keio Univ.) |
| 4th Author's Name | Takuji Mitsuishi |
| 4th Author's Affiliation | Keio University (Keio Univ.) |
| 5th Author's Name | Hideharu Amano |
| 5th Author's Affiliation | Keio University (Keio Univ.) |
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| Speaker | Author-1 |
| Date Time | 2014-01-28 09:20:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | VLD2013-104, CPSY2013-75, RECONF2013-58 |
| Volume (vol) | vol.113 |
| Number (no) | no.416(VLD), no.417(CPSY), no.418(RECONF) |
| Page | pp.13-18 |
| #Pages | 6 |
| Date of Issue | 2014-01-21 (VLD, CPSY, RECONF) |
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