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Paper Abstract and Keywords
Presentation 2014-01-28 15:25
A Vertical Link On/Off Algorithm for Wireless 3-D NoCs
Go Matsumura (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.) VLD2013-113 CPSY2013-84 RECONF2013-67
Abstract (in Japanese) (See Japanese page) 
(in English) To reduce power consumption of wireless three-dimension Network-on-Chips (wireless 3-D NoCs), in this paper we propose on/off link selection policy of vertical links. As the wireless transceivers work at a high operating
frequency (e.g., several GHz) to provide a high bit-rate of vertical links, inactivating low utilization vertical links can reduce the power consumption significantly. Based on spanning tree optimization using application traffic patterns, the least important vertical links are statically selected as inactive sleeping links. Evaluation results show
that the performance degradation is 2% when 50% of vertical links in a 4x4x4 wireless 3-D Mesh NoC are inactivated using the proposed on/off link selection policy. As the performance degradation is 4% when inactive links are selected randomly, the proposed on/off link selection policy can improve the trade-offs between performance and power.
Keyword (in Japanese) (See Japanese page) 
(in English) Wireless 3-D Network-on-Chip / interconnection networks / on/off link control / / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 417, CPSY2013-84, pp. 67-72, Jan. 2014.
Paper # CPSY2013-84 
Date of Issue 2014-01-21 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2013-113 CPSY2013-84 RECONF2013-67

Conference Information
Committee IPSJ-SLDM CPSY RECONF VLD  
Conference Date 2014-01-28 - 2014-01-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To CPSY 
Conference Code 2014-01-SLDM-CPSY-RECONF-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Vertical Link On/Off Algorithm for Wireless 3-D NoCs 
Sub Title (in English)  
Keyword(1) Wireless 3-D Network-on-Chip  
Keyword(2) interconnection networks  
Keyword(3) on/off link control  
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1st Author's Name Go Matsumura  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Michihiro Koibuchi  
2nd Author's Affiliation National Institute of Informatics (NII)
3rd Author's Name Hideharu Amano  
3rd Author's Affiliation Keio University (Keio Univ.)
4th Author's Name Hiroki Matsutani  
4th Author's Affiliation Keio University (Keio Univ.)
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Speaker Author-1 
Date Time 2014-01-28 15:25:00 
Presentation Time 25 minutes 
Registration for CPSY 
Paper # VLD2013-113, CPSY2013-84, RECONF2013-67 
Volume (vol) vol.113 
Number (no) no.416(VLD), no.417(CPSY), no.418(RECONF) 
Page pp.67-72 
#Pages 6 
Date of Issue 2014-01-21 (VLD, CPSY, RECONF) 

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