Paper Abstract and Keywords |
Presentation |
2014-01-29 14:40
[Invited Talk]
Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP) SDM2013-143 Link to ES Tech. Rep. Archives: SDM2013-143 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation voltage (Vdd). In the ultralow-Vdd regime, however, the upsurging delay (τpd) variability is the most important challenge. This paper proposes the balanced n/p drivability control method for reducing the die-to-die delay variation by back bias applicable for various circuits. Excellent variability reduction by this balanced control is demonstrated at Vdd = 0.4 V. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
SOTB / SOI / back bias / ring oscillator / τpd / variability / ultra-low voltage / |
Reference Info. |
IEICE Tech. Rep., vol. 113, no. 420, SDM2013-143, pp. 35-38, Jan. 2014. |
Paper # |
SDM2013-143 |
Date of Issue |
2014-01-22 (SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SDM2013-143 Link to ES Tech. Rep. Archives: SDM2013-143 |