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| Presentation | 2014-03-16 10:50 HPC interconnect for high topological embeddability by supplementary optical circuit switches Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII)  CPSY2013-111 DC2013-98 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Our goal is to run multiple parallel applications that have various communication patterns among participating processes in a single High-performance computing (HPC) system effectively. If the logical topology and the physical topology among electrical packet switches (EPSes) are different, however, the application will achieve low performance. Therefore, in this research, we propose a method of exploiting optical circuit switches (OCSes) and thus constructing an interconnection network that can embed several topologies among EPSes and achieve low latency. Our experimental result shows that our topology achieves both high topology embeddability and the overall low latency as compared to the other conventional topologies. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | High-performance computing (HPC) / optical circut switching / network topology / interconnection networks / datacenter networks / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 113, no. 497, CPSY2013-111, pp. 253-258, March 2014. | |
| Paper # | CPSY2013-111 | |
| Date of Issue | 2014-03-08 (CPSY, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2013-111 DC2013-98 |
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| Conference Information | |
| Committee | CPSY IPSJ-EMB IPSJ-SLDM DC |
| Conference Date | 2014-03-15 - 2014-03-16 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2014-03-CPSY-EMB-SLDM-DC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | HPC interconnect for high topological embeddability by supplementary optical circuit switches |
| Sub Title (in English) | |
| Keyword(1) | High-performance computing (HPC) |
| Keyword(2) | optical circut switching |
| Keyword(3) | network topology |
| Keyword(4) | interconnection networks |
| Keyword(5) | datacenter networks |
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| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Ryuta Kawano |
| 1st Author's Affiliation | Keio University (Keio Univ.) |
| 2nd Author's Name | Ikki Fujiwara |
| 2nd Author's Affiliation | National Institute of Informatics (NII) |
| 3rd Author's Name | Hiroki Matsutani |
| 3rd Author's Affiliation | Keio University (Keio Univ.) |
| 4th Author's Name | Hideharu Amano |
| 4th Author's Affiliation | Keio University (Keio Univ.) |
| 5th Author's Name | Michihiro Koibuchi |
| 5th Author's Affiliation | National Institute of Informatics (NII) |
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| Speaker | Author-1 |
| Date Time | 2014-03-16 10:50:00 |
| Presentation Time | 25 minutes |
| Registration for | CPSY |
| Paper # | CPSY2013-111, DC2013-98 |
| Volume (vol) | vol.113 |
| Number (no) | no.497(CPSY), no.498(DC) |
| Page | pp.253-258 |
| #Pages | 6 |
| Date of Issue | 2014-03-08 (CPSY, DC) |
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