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Paper Abstract and Keywords
Presentation 2014-04-18 10:30
[Invited Talk] A 7ns-Access-Time 25μW/MHz 128kb SRAM for Low-Power Fast Wake-Up MCU in 65nm CMOS with 27fA/b Retention Current
Toshikazu Fukuda, Koji Kohara, Toshiaki Dozaka, Yasuhisa Takeyama, Tsuyoshi Midorikawa (Toshiba), Kenji Hashimoto, Ichiro Wakiyama (TOSMEC), Shinji Miyano, Takehiko Hojo (Toshiba) ICD2014-12
Abstract (in Japanese) (See Japanese page) 
(in English) Low leakage 128kb SRAM with 65 nm technology that consumes only 3.5nA (27fA/b) in the retention mode is fabricated. Operation power consumption is also reduced to 25μW/MHz by adopting quarter array activation scheme（QAAS） charge shared hierarchical bit line（CSHBL）. Its leakage current is negligible small compared to the deep sleep mode current of the low power MCU, all of SRAMs in the chip can be awaken even in the deep sleep mode.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / Low Lekage Current / MCU / XLLSRAM / QAAS / CSHBL / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 13, ICD2014-12, pp. 59-64, April 2014.
Paper # ICD2014-12 
Date of Issue 2014-04-10 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2014-12

Conference Information
Committee ICD  
Conference Date 2014-04-17 - 2014-04-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2014-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 7ns-Access-Time 25μW/MHz 128kb SRAM for Low-Power Fast Wake-Up MCU in 65nm CMOS with 27fA/b Retention Current 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) Low Lekage Current  
Keyword(3) MCU  
Keyword(4) XLLSRAM  
Keyword(5) QAAS  
Keyword(6) CSHBL  
Keyword(7)  
Keyword(8)  
1st Author's Name Toshikazu Fukuda  
1st Author's Affiliation Toshiba Corporation (Toshiba)
2nd Author's Name Koji Kohara  
2nd Author's Affiliation Toshiba Corporation (Toshiba)
3rd Author's Name Toshiaki Dozaka  
3rd Author's Affiliation Toshiba Corporation (Toshiba)
4th Author's Name Yasuhisa Takeyama  
4th Author's Affiliation Toshiba Corporation (Toshiba)
5th Author's Name Tsuyoshi Midorikawa  
5th Author's Affiliation Toshiba Corporation (Toshiba)
6th Author's Name Kenji Hashimoto  
6th Author's Affiliation Toshiba Microelectronics Corporation (TOSMEC)
7th Author's Name Ichiro Wakiyama  
7th Author's Affiliation Toshiba Microelectronics Corporation (TOSMEC)
8th Author's Name Shinji Miyano  
8th Author's Affiliation Toshiba Corporation (Toshiba)
9th Author's Name Takehiko Hojo  
9th Author's Affiliation Toshiba Corporation (Toshiba)
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Speaker Author-1 
Date Time 2014-04-18 10:30:00 
Presentation Time 50 minutes 
Registration for ICD 
Paper # ICD2014-12 
Volume (vol) vol.114 
Number (no) no.13 
Page pp.59-64 
#Pages 6 
Date of Issue 2014-04-10 (ICD) 

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