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Paper Abstract and Keywords
Presentation 2014-05-29 11:30
LELECUT Triple Patterning Lithography Layout Decomposition using Positive Semidefinite Relaxation
Yukihide Kohira (Univ. of Aizu), Tomomi Matsui (Tokyo Tech), Yoko Yokoyama, Chikaaki Kodama (Toshiba), Atsushi Takahashi (Tokyo Tech), Shigeki Nojima, Satoshi Tanaka (Toshiba) VLD2014-6
Abstract (in Japanese) (See Japanese page) 
(in English) One of the most promising techniques in the 14 nm logic node and beyond is triple patterning lithography (TPL). Recently, LELECUT type TPL technology, where the third mask is used to cut the patterns, is discussed to alleviate native conflict and overlay problems in LELELE type TPL. In this paper, we formulate LELECUT decomposition problem which maximizes the compliance to the lithography and apply positive semidefinite relaxations. In our proposed methods, LELECUT decomposition is obtained from an optimum solution of the positive semidefinite relaxations by randomized rounding technique.
Keyword (in Japanese) (See Japanese page) 
(in English) Triple Patterning / LELECUT / Semidefinite Programming / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 59, VLD2014-6, pp. 27-32, May 2014.
Paper # VLD2014-6 
Date of Issue 2014-05-22 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2014-6

Conference Information
Committee VLD IPSJ-SLDM  
Conference Date 2014-05-28 - 2014-05-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitakyushu International Conference Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) System Design, etc. 
Paper Information
Registration To VLD 
Conference Code 2014-05-VLD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) LELECUT Triple Patterning Lithography Layout Decomposition using Positive Semidefinite Relaxation 
Sub Title (in English)  
Keyword(1) Triple Patterning  
Keyword(2) LELECUT  
Keyword(3) Semidefinite Programming  
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1st Author's Name Yukihide Kohira  
1st Author's Affiliation The University of Aizu (Univ. of Aizu)
2nd Author's Name Tomomi Matsui  
2nd Author's Affiliation Tokyo Institute of Technology (Tokyo Tech)
3rd Author's Name Yoko Yokoyama  
3rd Author's Affiliation Toshiba Corporation (Toshiba)
4th Author's Name Chikaaki Kodama  
4th Author's Affiliation Toshiba Corporation (Toshiba)
5th Author's Name Atsushi Takahashi  
5th Author's Affiliation Tokyo Institute of Technology (Tokyo Tech)
6th Author's Name Shigeki Nojima  
6th Author's Affiliation Toshiba Corporation (Toshiba)
7th Author's Name Satoshi Tanaka  
7th Author's Affiliation Toshiba Corporation (Toshiba)
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Speaker Author-1 
Date Time 2014-05-29 11:30:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2014-6 
Volume (vol) vol.114 
Number (no) no.59 
Page pp.27-32 
#Pages 6 
Date of Issue 2014-05-22 (VLD) 

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