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Paper Abstract and Keywords
Presentation 2014-09-19 11:00
GRAPE9-MPX: A development of an accelerator dedicated for arbitrary-precision arithmetic by the FPGA boards
Shinji Motoki (KEK), Hiroshi Daisaka (Hitotsubashi Univ.), Naohito Nakasato (Univ. of Aizu), Tadashi Ishikawa, Fukuko Yuasa (KEK), Toshiyuki Fukushige, Atsushi Kawai (K & F Computing Research), Junichiro Makino (RIKEN/TITECH) RECONF2014-29
Abstract (in Japanese) (See Japanese page) 
(in English) Higher order corrections in perturbative quantum field theory are required for precise theoretical analysis to investigate the new physics. Feynman loop diagrams which appear in the calculation of the corrections are taken into account, leading to the evaluation of loop integrals. We developed GRAPE9-MPX system consisting of multiple FPGA boards to accelerate parallel computation of loop integrals. In the system, we implemented Processor Elements (PE) to realize quadruple/hexuple-precision arithmetics in FPGA. The theoretical perk speed in the current implementation is about 6.6 Gflops (quadruple-precision) and 3.2 Gflops (hexuple-precision). With the compiler we are developing, the program code is generated automatically with only inserting directives in C/C++
code. We present performance results for the case of Feynman two-loop integrals with quadruple precision and achieve the effective performance of 2.4Gflops for 1 board, 4.7Gflops for 2 boards, and 9.1Gflops for 4 boards, respectively.
Keyword (in Japanese) (See Japanese page) 
(in English) multiple-precision arithmetic / quadruple precision / FPGA / Feynman amplitude / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 223, RECONF2014-29, pp. 69-74, Sept. 2014.
Paper # RECONF2014-29 
Date of Issue 2014-09-11 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Conference Information
Committee RECONF  
Conference Date 2014-09-18 - 2014-09-19 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2014-09-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) GRAPE9-MPX: A development of an accelerator dedicated for arbitrary-precision arithmetic by the FPGA boards 
Sub Title (in English)  
Keyword(1) multiple-precision arithmetic  
Keyword(2) quadruple precision  
Keyword(3) FPGA  
Keyword(4) Feynman amplitude  
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1st Author's Name Shinji Motoki  
1st Author's Affiliation High Energy Accelerator Research Organization (KEK)
2nd Author's Name Hiroshi Daisaka  
2nd Author's Affiliation Hitotsubashi University (Hitotsubashi Univ.)
3rd Author's Name Naohito Nakasato  
3rd Author's Affiliation University of Aizu (Univ. of Aizu)
4th Author's Name Tadashi Ishikawa  
4th Author's Affiliation High Energy Accelerator Research Organization (KEK)
5th Author's Name Fukuko Yuasa  
5th Author's Affiliation High Energy Accelerator Research Organization (KEK)
6th Author's Name Toshiyuki Fukushige  
6th Author's Affiliation K & F Computing Research Corporation (K & F Computing Research)
7th Author's Name Atsushi Kawai  
7th Author's Affiliation K & F Computing Research Corporation (K & F Computing Research)
8th Author's Name Junichiro Makino  
8th Author's Affiliation RIKEN Advanced Institute for Computational Science/Earth-Life Science Institute, Tokyo Institute of Technology (RIKEN/TITECH)
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Speaker Author-1 
Date Time 2014-09-19 11:00:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2014-29 
Volume (vol) vol.114 
Number (no) no.223 
Page pp.69-74 
#Pages
Date of Issue 2014-09-11 (RECONF) 


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