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Paper Abstract and Keywords
Presentation 2014-11-26 09:15
A study on automated arithmetic pipeline design on multi-FPGA systems
Yusuke Hirai, Katsuki Kyan, Makoto Arakaki (Univ. Ryukyus), Hideharu Amano (Keio Univ.), Naoyuki Fujita (JAXA), Yasunori Osana (Univ. Ryukyus) RECONF2014-34
Abstract (in Japanese) (See Japanese page) 
(in English) Computational fluid dynamics (CFD), a powerful tool for aircraft
design and other mechanical designs is a major application in
computational science. Since CFD is a CPU intensive application,
several challenges have made to accelerate the computation with
FPGA. In this report, we propose a method toward automated arithmetic pipeline design in multi-FPGA system such as FLOPS-2D.
This method converts an equation to dataflow, then generates divided netlist, RTL and configuration bitstreams for each FPGA in the system. As the result, bitstreams had successfully obtained.
Keyword (in Japanese) (See Japanese page) 
(in English) Multi-FPGA system / CFD / Arithmetic pipeline / Automated design / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 331, RECONF2014-34, pp. 1-6, Nov. 2014.
Paper # RECONF2014-34 
Date of Issue 2014-11-19 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2014-34

Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2014-11-26 - 2014-11-28 
Place (in Japanese) (See Japanese page) 
Place (in English) B-ConPlaza 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2014 -New Field of VLSI Design- 
Paper Information
Registration To RECONF 
Conference Code 2014-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A study on automated arithmetic pipeline design on multi-FPGA systems 
Sub Title (in English)  
Keyword(1) Multi-FPGA system  
Keyword(2) CFD  
Keyword(3) Arithmetic pipeline  
Keyword(4) Automated design  
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Keyword(6)  
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1st Author's Name Yusuke Hirai  
1st Author's Affiliation University of the Ryukyus (Univ. Ryukyus)
2nd Author's Name Katsuki Kyan  
2nd Author's Affiliation University of the Ryukyus (Univ. Ryukyus)
3rd Author's Name Makoto Arakaki  
3rd Author's Affiliation University of the Ryukyus (Univ. Ryukyus)
4th Author's Name Hideharu Amano  
4th Author's Affiliation Keio University (Keio Univ.)
5th Author's Name Naoyuki Fujita  
5th Author's Affiliation Japan Aerospace Exploration Agency (JAXA)
6th Author's Name Yasunori Osana  
6th Author's Affiliation University of the Ryukyus (Univ. Ryukyus)
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Speaker Author-1 
Date Time 2014-11-26 09:15:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2014-34 
Volume (vol) vol.114 
Number (no) no.331 
Page pp.1-6 
#Pages 6 
Date of Issue 2014-11-19 (RECONF) 

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