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Paper Abstract and Keywords
Presentation 2015-01-27 11:15
[Invited Talk] High-performance tri-gate poly-Ge Junction-less p- and n-MOSFETs Fabricated by Flash Lamp Annealing Process
Koji Usuda, Yoshiki Kamata, Yuuichi Kamimuta, Takahiro Mori, Masahiro Koike, Tsutomu Tezuka (AIST) SDM2014-138
Abstract (in Japanese) (See Japanese page) 
(in English) Poly-crystalline Ge (poly-Ge) layer can be candidate for the channel of stacking 3D-CMOS from the viewpoint of low-thermal budget processes. However, the performances have been lower than that of poly-crystalline Si (poly-Si). We employed a flash lamp annealing (FLA) method to form high quality poly-Ge. As a results, Hall effect hole and electron mobility were as high as 200 and 140 (cm2/Vs). Drive current of junction-less (JL) nMOSFETs was greatly improved (x10). And drive current of the pMOSFET exhibited 311 µA/µm, which was higher than that of poly-Si pMOSFET. Hence, FLA poly-Ge CMOS will provide great potential for future 3D LSIs.
Keyword (in Japanese) (See Japanese page) 
(in English) Ge / MOSFET / Flash Lamp Annealing / poly crystalline / 3D-CMOS / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 421, SDM2014-138, pp. 13-16, Jan. 2015.
Paper # SDM2014-138 
Date of Issue 2015-01-20 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM  
Conference Date 2015-01-27 - 2015-01-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SDM 
Conference Code 2015-01-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) High-performance tri-gate poly-Ge Junction-less p- and n-MOSFETs Fabricated by Flash Lamp Annealing Process 
Sub Title (in English)  
Keyword(1) Ge  
Keyword(2) MOSFET  
Keyword(3) Flash Lamp Annealing  
Keyword(4) poly crystalline  
Keyword(5) 3D-CMOS  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Koji Usuda  
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
2nd Author's Name Yoshiki Kamata  
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
3rd Author's Name Yuuichi Kamimuta  
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
4th Author's Name Takahiro Mori  
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
5th Author's Name Masahiro Koike  
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
6th Author's Name Tsutomu Tezuka  
6th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker Author-1 
Date Time 2015-01-27 11:15:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2014-138 
Volume (vol) vol.114 
Number (no) no.421 
Page pp.13-16 
#Pages 4 
Date of Issue 2015-01-20 (SDM) 

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