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Paper Abstract and Keywords
Presentation 2015-03-06 13:00
A Case for Accelerating Data Structure Sever using FPGA NIC
Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) CPSY2014-162 DC2014-88
Abstract (in Japanese) (See Japanese page) 
(in English) Conventional Key-Value Store (KVS) type databases store data as pairs of key and value. A data structure server is a KVS server that supports various data types, such as string, list, set, and hash. To accelerate such data structure servers, this paper discusses a design of standalone database processing cores combined with a network protocol stack implemented on an FPGA NIC. More specifically, we assume that the proposed database processing cores are implemented on an FPGA NIC that has four 10GbE interfaces and data are stored into the on-board memory. Because data processing cycles depend on the data types, dedicated cores for each data type are implemented and running in parallel, instead of a deeply-pipelined single datapath proposed previously. In this paper, we build a performance model of these database processing cores and estimate the performance improvement for the data structure servers. Analysis results assuming a 40Gbps network interface show that to achieve a line-rate request processing performance, approximately 35 processing cores are needed to be implemented.
Keyword (in Japanese) (See Japanese page) 
(in English) Storctured Storage / Key-Value Store / FPGA / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 506, CPSY2014-162, pp. 1-6, March 2015.
Paper # CPSY2014-162 
Date of Issue 2015-02-27 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee CPSY IPSJ-EMB IPSJ-SLDM DC  
Conference Date 2015-03-06 - 2015-03-07 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CPSY 
Conference Code 2015-03-CPSY-EMB-SLDM-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Case for Accelerating Data Structure Sever using FPGA NIC 
Sub Title (in English)  
Keyword(1) Storctured Storage  
Keyword(2) Key-Value Store  
Keyword(3) FPGA  
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1st Author's Name Yuta Tokusashi  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Hiroki Matsutani  
2nd Author's Affiliation Keio University (Keio Univ.)
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Speaker Author-1 
Date Time 2015-03-06 13:00:00 
Presentation Time 25 minutes 
Registration for CPSY 
Paper # CPSY2014-162, DC2014-88 
Volume (vol) vol.114 
Number (no) no.506(CPSY), no.507(DC) 
Page pp.1-6 
#Pages 6 
Date of Issue 2015-02-27 (CPSY, DC) 

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