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Paper Abstract and Keywords
Presentation 2015-03-06 10:15
Evaluation of Greedy Algorithms for Embedding Multiple VLANs
Andrew Lee, Shuichi Miyazaki, Yasuo Okabe (Kyoto Univ.) SITE2014-73 IA2014-105
Abstract (in Japanese) (See Japanese page) 
(in English) Given the same amount of hardware resource and bandwidth limitation, networks with optimal configurations enable Internet service providers to provide a lower end-to-end latency service for clients to use. In the case of designing VLAN, due to the lack of effective automation tool at present, most configurations are still done manually, hence it becomes hard to ensure the optimum of a designed network especially when the scale of the given network grows larger. In this paper, our goal is to construct an automated procedure for embedding multiple VLANs above the same physical network by first defining the performance criteria and then introducing the Minimum Diameter Multiple Steiner Tree problem as the model of this problem. We propose several greedy algorithms to solve the model problem as well as evaluating the performance results obtained by simulated data. Our result shows that an embedding order of higher bandwidth requirement first has a higher chance to reduce the latency sum of multiple VLANs in a full mesh network.
Keyword (in Japanese) (See Japanese page) 
(in English) VLAN / network topology / greedy algorithm / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 495, IA2014-105, pp. 143-147, March 2015.
Paper # IA2014-105 
Date of Issue 2015-02-26 (SITE, IA) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SITE2014-73 IA2014-105

Conference Information
Committee IA IPSJ-IOT SITE  
Conference Date 2015-03-05 - 2015-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Internet and Information Ethics Education, etc. 
Paper Information
Registration To IA 
Conference Code 2015-03-IA-IOT-SITE 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation of Greedy Algorithms for Embedding Multiple VLANs 
Sub Title (in English)  
Keyword(1) VLAN  
Keyword(2) network topology  
Keyword(3) greedy algorithm  
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1st Author's Name Andrew Lee  
1st Author's Affiliation Kyoto University (Kyoto Univ.)
2nd Author's Name Shuichi Miyazaki  
2nd Author's Affiliation Kyoto University (Kyoto Univ.)
3rd Author's Name Yasuo Okabe  
3rd Author's Affiliation Kyoto University (Kyoto Univ.)
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Speaker Author-1 
Date Time 2015-03-06 10:15:00 
Presentation Time 25 minutes 
Registration for IA 
Paper # SITE2014-73, IA2014-105 
Volume (vol) vol.114 
Number (no) no.494(SITE), no.495(IA) 
Page pp.143-147 
#Pages 5 
Date of Issue 2015-02-26 (SITE, IA) 

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