講演抄録/キーワード |
講演名 |
2015-04-16 16:05
[依頼講演]A Low-Power 64Gb MLC NAND-Flash Memory in 15nm CMOS Technology ○Mario Sako・Takao Nakajima・Junpei Sato・Kazuyoshi Muraoka・Masaki Fujiu・Fumihiro Kono・Michio Nakagawa・Masami Masuda・Koji Kato・Yuri Terada・Yuki Shimizu・Mitsuaki Honma・Yoshinao Suzuki・Yoshihisa Watanabe(Toshiba)・Ryuji Yamashita(SanDisk) ICD2015-6 エレソ技報アーカイブへのリンク:ICD2015-6 |
抄録 |
(和) |
A 75mm2 low power 64Gb MLC NAND flash memory capable of 30MB/s program throughput and 533MB/s data transfer rate at 1.8V supply voltage is developed in 15nm CMOS technology. 36% power reduction from 3.3V design is achieved by a new pumping scheme. New low current peak features reduce a multi-die concurrent programming peak by 65% for 4-die case, and an erase verifying peak by 40%, respectively. Nano-scale transistors reducing bitline discharge time by 70% is introduced to improve performance. |
(英) |
A 75mm2 low power 64Gb MLC NAND flash memory capable of 30MB/s program throughput and 533MB/s data transfer rate at 1.8V supply voltage is developed in 15nm CMOS technology. 36% power reduction from 3.3V design is achieved by a new pumping scheme. New low current peak features reduce a multi-die concurrent programming peak by 65% for 4-die case, and an erase verifying peak by 40%, respectively. Nano-scale transistors reducing bitline discharge time by 70% is introduced to improve performance. |
キーワード |
(和) |
/ / / / / / / |
(英) |
NAND / Flash / memory / MLC / Low power / / / |
文献情報 |
信学技報, vol. 115, no. 6, ICD2015-6, pp. 27-30, 2015年4月. |
資料番号 |
ICD2015-6 |
発行日 |
2015-04-09 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
PDFダウンロード |
ICD2015-6 エレソ技報アーカイブへのリンク:ICD2015-6 |