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Paper Abstract and Keywords
Presentation 2015-06-19 16:00
An arithmetic design approach with diversity and redundancy for FPGAs
Yudai Shirakura, Kenichi Morimoto (Nagasaki Univ.), Masanori Nobe (MHPS), Masaharu Tanaka (MHI), Yuichiro Shibata, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) RECONF2015-11
Abstract (in Japanese) (See Japanese page) 
(in English) While application of FPGAs in control systems of industrial infrastructures is promising, a warranty of the functional safety is an important challenge. This paper proposes a new design method of module redundancy with diversity, focusing on a technology mapping of logic to FPGA resources. The proposed method is compared with conventional module redundancy designs with a timing simulation of FPGA net lists. The results demonstrate that the proposed method can effectively improve the error detection ratio in overclock execution.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / functional safety / diversity / redundancy / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 109, RECONF2015-11, pp. 59-63, June 2015.
Paper # RECONF2015-11 
Date of Issue 2015-06-12 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
Download PDF RECONF2015-11

Conference Information
Committee RECONF  
Conference Date 2015-06-19 - 2015-06-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyoto University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) the 10th anniversary celebration of RECONF: Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2015-06-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An arithmetic design approach with diversity and redundancy for FPGAs 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) functional safety  
Keyword(3) diversity  
Keyword(4) redundancy  
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1st Author's Name Yudai Shirakura  
1st Author's Affiliation Nagasaki University (Nagasaki Univ.)
2nd Author's Name Kenichi Morimoto  
2nd Author's Affiliation Nagasaki University (Nagasaki Univ.)
3rd Author's Name Masanori Nobe  
3rd Author's Affiliation Mitsubishi Hitachi Power Systems (MHPS)
4th Author's Name Masaharu Tanaka  
4th Author's Affiliation Mitsubishi Heavy Industories (MHI)
5th Author's Name Yuichiro Shibata  
5th Author's Affiliation Nagasaki University (Nagasaki Univ.)
6th Author's Name Hidenori Maruta  
6th Author's Affiliation Nagasaki University (Nagasaki Univ.)
7th Author's Name Fujio Kurokawa  
7th Author's Affiliation Nagasaki University (Nagasaki Univ.)
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Speaker Author-1 
Date Time 2015-06-19 16:00:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2015-11 
Volume (vol) vol.115 
Number (no) no.109 
Page pp.59-63 
#Pages 5 
Date of Issue 2015-06-12 (RECONF) 

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