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Paper Abstract and Keywords
Presentation 2015-06-20 17:15
High-Level Synthesis Compiler for Hierarchical and Modular Design of Stream Computing Cores
Kentaro Sano, Ryo Ito, Keisuke Sugawara, Satoru Yamamoto (Tohoku Univ.) RECONF2015-29
Abstract (in Japanese) (See Japanese page) 
(in English) Although FPGA-based custom hardware is expected for low-power and high-performance computation, productivity improvement is still a challenging issue for efficiently and effectively using FPGAs. In this paper, we report the development progress of our hardware compiler for higher productivity in designing custom computing machines.
Keyword (in Japanese) (See Japanese page) 
(in English) hardware compiler / FPGA / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 109, RECONF2015-29, pp. 159-164, June 2015.
Paper # RECONF2015-29 
Date of Issue 2015-06-12 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
Download PDF RECONF2015-29

Conference Information
Committee RECONF  
Conference Date 2015-06-19 - 2015-06-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyoto University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) the 10th anniversary celebration of RECONF: Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2015-06-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) High-Level Synthesis Compiler for Hierarchical and Modular Design of Stream Computing Cores 
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Keyword(2) FPGA  
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1st Author's Name Kentaro Sano  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Ryo Ito  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Keisuke Sugawara  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
4th Author's Name Satoru Yamamoto  
4th Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2015-06-20 17:15:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2015-29 
Volume (vol) vol.115 
Number (no) no.109 
Page pp.159-164 
#Pages 6 
Date of Issue 2015-06-12 (RECONF) 

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