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Paper Abstract and Keywords
Presentation 2015-06-20 11:35
FPGA Implementation of a key generation circuit using PUF and Fuzzy Extractor on SASEBO-G3
Yohei Hori, Toshihiro Katashita (AIST) RECONF2015-19
Abstract (in Japanese) (See Japanese page) 
(in English) We implemented a key generation circuit using a Physically Unclonable Function (PUF) and Fuzzy Extractor (FE) to a Kintex-7 FPGA on SASEBO-G3. PUF is a circuit that generates a chip-specific value exploiting device variation. FE is a technique using error correcting codes to restore original data from noisy data. Our key generation circuit includes an Arbiter PUF circuit, FE with Reed-Solomon encoder/decoder and AES encryption/decryption circuits. In this paper, we illustrate the structure of our key generation circuit and evaluate the size and working frequency of the circuit.
Keyword (in Japanese) (See Japanese page) 
(in English) Physically Unclonable Function (PUF) / Fuzzy Extractor / Reed-Solomon codes / FPGA / cipher key generation / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 109, RECONF2015-19, pp. 103-108, June 2015.
Paper # RECONF2015-19 
Date of Issue 2015-06-12 (RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
Download PDF RECONF2015-19

Conference Information
Committee RECONF  
Conference Date 2015-06-19 - 2015-06-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyoto University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) the 10th anniversary celebration of RECONF: Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2015-06-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) FPGA Implementation of a key generation circuit using PUF and Fuzzy Extractor on SASEBO-G3 
Sub Title (in English)  
Keyword(1) Physically Unclonable Function (PUF)  
Keyword(2) Fuzzy Extractor  
Keyword(3) Reed-Solomon codes  
Keyword(4) FPGA  
Keyword(5) cipher key generation  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yohei Hori  
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
2nd Author's Name Toshihiro Katashita  
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker Author-1 
Date Time 2015-06-20 11:35:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # RECONF2015-19 
Volume (vol) vol.115 
Number (no) no.109 
Page pp.103-108 
#Pages 6 
Date of Issue 2015-06-12 (RECONF) 

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