Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2015-08-05 14:30
Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation
Hiroyuki Obuchi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2015-29
Abstract (in Japanese) (See Japanese page) 
(in English) In order to effectively utilize the performance of multicore processors spreading commonly at present, it is an important issue to speed up programs by using thread-level parallelism. we have developed the automated parallel processing system for binary codes without referring to the source codes by using Valgrind, which is a dynamic binary translation framework. In this system, the overhead in the thread control when executing the generated multithreaded code can cause the performance of the system to be degraded. To solve this problem, we compare and examine some thread control methods about creation and management of threads, about assignment of threads to processors, and clarify the most efficient method.
Keyword (in Japanese) (See Japanese page) 
(in English) thread level parallel processing / dynamic binary translation / automatic parallelization / runtime overhead / thread control / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 174, CPSY2015-29, pp. 155-160, Aug. 2015.
Paper # CPSY2015-29 
Date of Issue 2015-07-28 (CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2015-29

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2015-08-04 - 2015-08-06 
Place (in Japanese) (See Japanese page) 
Place (in English) B-Con Plaza (Beppu) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Parallel, Distributed and Cooperative Processing 
Paper Information
Registration To CPSY 
Conference Code 2015-08-CPSY-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation 
Sub Title (in English)  
Keyword(1) thread level parallel processing  
Keyword(2) dynamic binary translation  
Keyword(3) automatic parallelization  
Keyword(4) runtime overhead  
Keyword(5) thread control  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Hiroyuki Obuchi  
1st Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
2nd Author's Name Kanemitsu Ootsu  
2nd Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
3rd Author's Name Takeshi Ohkawa  
3rd Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
4th Author's Name Takashi Yokota  
4th Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2015-08-05 14:30:00 
Presentation Time 30 minutes 
Registration for CPSY 
Paper # CPSY2015-29 
Volume (vol) vol.115 
Number (no) no.174 
Page pp.155-160 
#Pages 6 
Date of Issue 2015-07-28 (CPSY) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan