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Paper Abstract and Keywords
Presentation 2015-12-03 11:40
Implementation of Precision Resistance Measurement of TSVs Using Analog Boundary Scan
Senling Wang, Keisuke Kagawa (Ehime Univ.), Shuichi Kameyama (Fujitsu), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) VLD2015-65 DC2015-61
Abstract (in Japanese) (See Japanese page) 
(in English) (Not available yet)
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(in English) / / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 338, VLD2015-65, pp. 177-182, Dec. 2015.
Paper # VLD2015-65 
Date of Issue 2015-11-24 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2015-12-01 - 2015-12-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Nagasaki Kinro Fukushi Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2015 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2015-12-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation of Precision Resistance Measurement of TSVs Using Analog Boundary Scan 
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1st Author's Name Senling Wang  
1st Author's Affiliation Ehime University (Ehime Univ.)
2nd Author's Name Keisuke Kagawa  
2nd Author's Affiliation Ehime University (Ehime Univ.)
3rd Author's Name Shuichi Kameyama  
3rd Author's Affiliation Fujitsu Limited (Fujitsu)
4th Author's Name Yoshinobu Higami  
4th Author's Affiliation Ehime University (Ehime Univ.)
5th Author's Name Hiroshi Takahashi  
5th Author's Affiliation Ehime University (Ehime Univ.)
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Date Time 2015-12-03 11:40:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2015-65, DC2015-61 
Volume (vol) vol.115 
Number (no) no.338(VLD), no.339(DC) 
Page pp.177-182 
#Pages
Date of Issue 2015-11-24 (VLD, DC) 


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