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Paper Abstract and Keywords
Presentation 2016-01-20 09:25
Implementation and evaluation of Dynamic Multi-Vth methodology in Silicon-on-Thin-BOX
Shohei Io, Hanano Suzuki, Shohei Nakamura, Kimiyoshi Usami (Shibaura IT) VLD2015-88 CPSY2015-120 RECONF2015-70
Abstract (in Japanese) (See Japanese page) 
(in English) Silicon-on-Thin-BOX is one of the FD-SOI devices. It operates at ultra-low voltage and it is possible to effectively change the threshold voltage of the transistor by body biasing. So far, a design technique that realizes multi-Vth using body biasing has been proposed. After designing the circuit which consists of only low threshold transistors, the threshold voltage is raised dynamically at the area which does not need high-speed operation by applying body biasing. In this paper, we propose a new layout design approach and demonstrate effectiveness through implementation and real chip evaluation in 65nm SOTB process.
Keyword (in Japanese) (See Japanese page) 
(in English) Silicon-on-Thin-BOX / Body Bias / Multi Vth / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 398, VLD2015-88, pp. 91-96, Jan. 2016.
Paper # VLD2015-88 
Date of Issue 2016-01-12 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2015-88 CPSY2015-120 RECONF2015-70

Conference Information
Committee VLD CPSY RECONF IPSJ-SLDM IPSJ-ARC  
Conference Date 2016-01-19 - 2016-01-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To VLD 
Conference Code 2016-01-VLD-CPSY-RECONF-SLDM-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation and evaluation of Dynamic Multi-Vth methodology in Silicon-on-Thin-BOX 
Sub Title (in English)  
Keyword(1) Silicon-on-Thin-BOX  
Keyword(2) Body Bias  
Keyword(3) Multi Vth  
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1st Author's Name Shohei Io  
1st Author's Affiliation Shibaura Institute of Technology (Shibaura IT)
2nd Author's Name Hanano Suzuki  
2nd Author's Affiliation Shibaura Institute of Technology (Shibaura IT)
3rd Author's Name Shohei Nakamura  
3rd Author's Affiliation Shibaura Institute of Technology (Shibaura IT)
4th Author's Name Kimiyoshi Usami  
4th Author's Affiliation Shibaura Institute of Technology (Shibaura IT)
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Speaker Author-1 
Date Time 2016-01-20 09:25:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2015-88, CPSY2015-120, RECONF2015-70 
Volume (vol) vol.115 
Number (no) no.398(VLD), no.399(CPSY), no.400(RECONF) 
Page pp.91-96 
#Pages 6 
Date of Issue 2016-01-12 (VLD, CPSY, RECONF) 

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