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Paper Abstract and Keywords
Presentation 2016-01-20 16:35
A performance evaluation of PEACH3
Takahiro Kaneda, Chiharu Tsuruta (Keio Univ), Toshihiro Hanawa (UTokyo), Hideharu Amano (Keio Univ) VLD2015-96 CPSY2015-128 RECONF2015-78
Abstract (in Japanese) (See Japanese page) 
(in English) A recent rapid increase of GPU performance makes GPGPU (General Purpose Computation using on GPUs) a mainstream of high performance computing.
For a large scale target, multi-GPU systems in which a node with a few GPUs are connected through each host CPU have become popular.
However, such systems suffer a large latency to communicate between GPUs attached to different hosts.

In order to cope with this problem, Center for Computational Sciences, University of Tsukuba has developed a tightly couple accelerators (TCA) architecture which connects a large number of GPUs directly with dedicated switches PEACH2 (PCI-Express Adaptive Communication Hub 2).
PEACH2 connects a host directly with PCI express Generation 2 x8, and forms a ring network by connecting neighboring PEACH2 switches directly also with PCI express.
But, the PCIe Gen 2 protocol's bandwidths are smaller for the HPC.
We developed the new board, PEACH3 with PCIe Gen 3 x8.
In this report, We had a communication test and evaluated the performance of the PEACH3, and we achieved about twice higher bandwidth and lower latency as compared to the CUDA API in CPU-GPU communication within the node.
In GPU-GPU communication that's across the nodes, PEACH3s have achieved almost the same performance as PEACH2s.
Even if a communication driver level compared to CPU-CPU communication, by utilizing the API was less performance loss.
Keyword (in Japanese) (See Japanese page) 
(in English) Heterogeneous cluster / Accelerator / GPU / TCA / PEACH3 / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 399, CPSY2015-128, pp. 155-160, Jan. 2016.
Paper # CPSY2015-128 
Date of Issue 2016-01-12 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2015-96 CPSY2015-128 RECONF2015-78

Conference Information
Committee VLD CPSY RECONF IPSJ-SLDM IPSJ-ARC  
Conference Date 2016-01-19 - 2016-01-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To CPSY 
Conference Code 2016-01-VLD-CPSY-RECONF-SLDM-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A performance evaluation of PEACH3 
Sub Title (in English)  
Keyword(1) Heterogeneous cluster  
Keyword(2) Accelerator  
Keyword(3) GPU  
Keyword(4) TCA  
Keyword(5) PEACH3  
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1st Author's Name Takahiro Kaneda  
1st Author's Affiliation Keio University (Keio Univ)
2nd Author's Name Chiharu Tsuruta  
2nd Author's Affiliation Keio University (Keio Univ)
3rd Author's Name Toshihiro Hanawa  
3rd Author's Affiliation The University Tokyo (UTokyo)
4th Author's Name Hideharu Amano  
4th Author's Affiliation Keio University (Keio Univ)
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Speaker Author-1 
Date Time 2016-01-20 16:35:00 
Presentation Time 25 minutes 
Registration for CPSY 
Paper # VLD2015-96, CPSY2015-128, RECONF2015-78 
Volume (vol) vol.115 
Number (no) no.398(VLD), no.399(CPSY), no.400(RECONF) 
Page pp.155-160 
#Pages 6 
Date of Issue 2016-01-12 (VLD, CPSY, RECONF) 

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