Paper Abstract and Keywords |
Presentation |
2016-01-21 11:20
An Architectural Optimization for Software Defined SSD using Full System Simulator Shun Gokita, Satoshi Kazama, Seiki Shibata, Shinya Kuwamura, Eiji Yoshida, Junji Ogawa (FLL) VLD2015-103 CPSY2015-135 RECONF2015-85 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In recent years, a kind of software-defined SSD which has a Flash control layer (FTL) in software teared out of hardware, is actively studied. In order to produce the best performance in the software-defined SSD, performance optimizations both of software and hardware are required. However it is difficult to estimate the system performance using actual application and or benchmark software in advance of hardware development completion. Therefore, it makes hard to achieve a sort of optimal architecture design. In this study, we estimated overall system performances using a full system simulator before our software-defined SSD hardware development done, and optimized the architecture. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Simulation / Architectural Exploration / Software Defined SSD / NAND Flash Memory / Next-Generation Non-Volatile Memory / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 399, CPSY2015-135, pp. 197-202, Jan. 2016. |
Paper # |
CPSY2015-135 |
Date of Issue |
2016-01-12 (VLD, CPSY, RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
VLD2015-103 CPSY2015-135 RECONF2015-85 |
Conference Information |
Committee |
VLD CPSY RECONF IPSJ-SLDM IPSJ-ARC |
Conference Date |
2016-01-19 - 2016-01-21 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Hiyoshi Campus, Keio University |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
FPGA Applications, etc |
Paper Information |
Registration To |
CPSY |
Conference Code |
2016-01-VLD-CPSY-RECONF-SLDM-ARC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An Architectural Optimization for Software Defined SSD using Full System Simulator |
Sub Title (in English) |
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Keyword(1) |
Simulation |
Keyword(2) |
Architectural Exploration |
Keyword(3) |
Software Defined SSD |
Keyword(4) |
NAND Flash Memory |
Keyword(5) |
Next-Generation Non-Volatile Memory |
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1st Author's Name |
Shun Gokita |
1st Author's Affiliation |
Fujitsu Laboratories Ltd. (FLL) |
2nd Author's Name |
Satoshi Kazama |
2nd Author's Affiliation |
Fujitsu Laboratories Ltd. (FLL) |
3rd Author's Name |
Seiki Shibata |
3rd Author's Affiliation |
Fujitsu Laboratories Ltd. (FLL) |
4th Author's Name |
Shinya Kuwamura |
4th Author's Affiliation |
Fujitsu Laboratories Ltd. (FLL) |
5th Author's Name |
Eiji Yoshida |
5th Author's Affiliation |
Fujitsu Laboratories Ltd. (FLL) |
6th Author's Name |
Junji Ogawa |
6th Author's Affiliation |
Fujitsu Laboratories Ltd. (FLL) |
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Speaker |
Author-1 |
Date Time |
2016-01-21 11:20:00 |
Presentation Time |
25 minutes |
Registration for |
CPSY |
Paper # |
VLD2015-103, CPSY2015-135, RECONF2015-85 |
Volume (vol) |
vol.115 |
Number (no) |
no.398(VLD), no.399(CPSY), no.400(RECONF) |
Page |
pp.197-202 |
#Pages |
6 |
Date of Issue |
2016-01-12 (VLD, CPSY, RECONF) |
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