Paper Abstract and Keywords |
Presentation |
2016-03-01 09:00
A Packet Lookup Engine LSI Based on Mismatch Detection and Hash Search Yoshifumi Kawamura, Kousuke Imamura (Kanazawa Univ.), Naoki Miura, Masami Urano, Satoshi Shigematsu (NTT), Tetsuya Matsumura (Nihon Univ.), Yoshio Matsuda (Kanazawa Univ.) VLD2015-118 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Developing an extremely efficient packet inspection algorithm for lookup engines is important to realize a high throughput and a lower energy dissipation. In previous work , we have proposed a search engine in combination with a match and mismatch detection circuit .In this paper , we propose the architecture of the new search engine based on a combination of a mismatch detection circuit and a linked list hash table. The experimental chip was fabricated in 40 nm 8 metal CMOS process technology. The experimental chip operated 100MHz under the VDD=1.1V, and throughput 100 Mpacket / s (= 51.2 Gb / s ) was obtained . The measured energy consumption is 0.808 NJ / search . |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
lookup engine / packet inspection / mismatch detection / hash search / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 465, VLD2015-118, pp. 43-48, Feb. 2016. |
Paper # |
VLD2015-118 |
Date of Issue |
2016-02-22 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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VLD2015-118 |
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