Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2016-03-08 09:15
Dynamically Assigned Distributed Processing System with SDN Switches
Masahiko Kitamura, Hiroyuki Kimiyama, Tomoko Sawabe, Tatsuya Fujii (NTT), Kazunari Kojima, Mitsuru Maruyama (KAIT) CQ2015-134
Abstract (in Japanese) (See Japanese page) 
(in English) The cloud services that enable us to use computing and networking resources on our demand drive many workflows into distributed processing schemes on these cloud, even the traditional workflows that have been difficult to do by introducing these high performance computing. We have been developing a system that provides a cost effective large-scale processing by finding and aggregating idling computing resources over cloud. To build this system, the network component that makes inter connection between computing worker nodes with full wire-rate speed and works as a load balancing functionality is needed.
To this end, we propose an approach of load balancing using SDN/OpenFlow. As a result of evaluation of this system, we find proposed system achieves load balancing functionality at about full wire-rate of 10Gbit/sec speed.
Keyword (in Japanese) (See Japanese page) 
(in English) Parallelized and distributed processing / SDN/OpenFlow / Dynamic load balancing / Scalability / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 496, CQ2015-134, pp. 147-151, March 2016.
Paper # CQ2015-134 
Date of Issue 2016-02-29 (CQ) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CQ2015-134

Conference Information
Committee IE IMQ MVE CQ  
Conference Date 2016-03-07 - 2016-03-08 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CQ 
Conference Code 2016-03-IE-IMQ-MVE-CQ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Dynamically Assigned Distributed Processing System with SDN Switches 
Sub Title (in English)  
Keyword(1) Parallelized and distributed processing  
Keyword(2) SDN/OpenFlow  
Keyword(3) Dynamic load balancing  
Keyword(4) Scalability  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Masahiko Kitamura  
1st Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
2nd Author's Name Hiroyuki Kimiyama  
2nd Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
3rd Author's Name Tomoko Sawabe  
3rd Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
4th Author's Name Tatsuya Fujii  
4th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
5th Author's Name Kazunari Kojima  
5th Author's Affiliation Kanagawa Institute of Technology (KAIT)
6th Author's Name Mitsuru Maruyama  
6th Author's Affiliation Kanagawa Institute of Technology (KAIT)
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2016-03-08 09:15:00 
Presentation Time 15 minutes 
Registration for CQ 
Paper # CQ2015-134 
Volume (vol) vol.115 
Number (no) no.496 
Page pp.147-151 
#Pages 5 
Date of Issue 2016-02-29 (CQ) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan