Paper Abstract and Keywords |
Presentation |
2016-03-10 14:30
A Multiplier Architecture for Finite Field of 254bit-Prime Square Order Based on Pipelined 32bit Montgomery Multipliers Yusuke Nagahama, Daisuke Fujimoto, Tsutomu Matsumoto (YNU) IT2015-116 ISEC2015-75 WBS2015-99 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Bilinear Pairing is a major tool to realize advanced cryptographic functionality such as searchable encryption, aggregate signature, proxy re-encryption, attribute-based and functional encryption. Pairing at 126bit security can be realized efficiently by using a BN curve over GF(p) with embedding degree 12, where p is a 254bit prime. Aiming at designing a superior hardware engine for the BN-curve based pairing computation including GF(p), GF(p^2), and GF(p^12) operations we propose a multiplier architecture for GF(p^2) based on pipelined 32bit Montgomery multipliers and evaluate the resultant performances. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Cryptographic Hardware Architecture / Finite Field Multiplier / Montgomery Multiplication / Pipeline Implementation / Pairing Cryptography / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 501, ISEC2015-75, pp. 95-100, March 2016. |
Paper # |
ISEC2015-75 |
Date of Issue |
2016-03-03 (IT, ISEC, WBS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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IT2015-116 ISEC2015-75 WBS2015-99 |
Conference Information |
Committee |
IT ISEC WBS |
Conference Date |
2016-03-10 - 2016-03-11 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
The University of Electro-Communications |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
joint meeting of IT, ISEC, and WBS |
Paper Information |
Registration To |
ISEC |
Conference Code |
2016-03-IT-ISEC-WBS |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Multiplier Architecture for Finite Field of 254bit-Prime Square Order Based on Pipelined 32bit Montgomery Multipliers |
Sub Title (in English) |
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Keyword(1) |
Cryptographic Hardware Architecture |
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Finite Field Multiplier |
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Montgomery Multiplication |
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Pipeline Implementation |
Keyword(5) |
Pairing Cryptography |
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1st Author's Name |
Yusuke Nagahama |
1st Author's Affiliation |
Yokohama National University (YNU) |
2nd Author's Name |
Daisuke Fujimoto |
2nd Author's Affiliation |
Yokohama National University (YNU) |
3rd Author's Name |
Tsutomu Matsumoto |
3rd Author's Affiliation |
Yokohama National University (YNU) |
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Speaker |
Author-1 |
Date Time |
2016-03-10 14:30:00 |
Presentation Time |
25 minutes |
Registration for |
ISEC |
Paper # |
IT2015-116, ISEC2015-75, WBS2015-99 |
Volume (vol) |
vol.115 |
Number (no) |
no.500(IT), no.501(ISEC), no.502(WBS) |
Page |
pp.95-100 |
#Pages |
6 |
Date of Issue |
2016-03-03 (IT, ISEC, WBS) |
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