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Paper Abstract and Keywords
Presentation 2016-06-16 11:20
Hardware Implementation of Stochastic Gammatone Filter
Naoya Onizawa, Shunsuke Koshita, Shuichi Sakamoto, Masahide Abe, Masayuki Kawamata, Takahiro Hanyu (Tohoku Univ.) CAS2016-6 VLD2016-12 SIP2016-40 MSS2016-6
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents a design of a gammatone filter based on stochastic computation. The gammatone filter well expresses the performance of human auditory peripheral mechanism and has a potential of improving advanced speech communications systems, such as hearing assisting devices and noise robust speech recognition systems. However, the hardware complexity of the gammatone filter is large due to the complex nonlinear characteristic. To address this issue, stochastic computation that exploits probabilistic information in hardware, is used for designing the gammatone filter, instead of binary computation commonly used in hardware. Using the stochastic computation, complex functions, such as multipliers, are realized using simple logic gates, leading to the simple hardware implementation.
Keyword (in Japanese) (See Japanese page) 
(in English) probabilistic computation / auditory filtering / digital integrated circuits / / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 93, CAS2016-6, pp. 29-34, June 2016.
Paper # CAS2016-6 
Date of Issue 2016-06-09 (CAS, VLD, SIP, MSS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2016-6 VLD2016-12 SIP2016-40 MSS2016-6

Conference Information
Committee VLD CAS MSS SIP  
Conference Date 2016-06-16 - 2016-06-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Hirosaki Shiritsu Kanko-kan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) System, signal processing and related topics 
Paper Information
Registration To CAS 
Conference Code 2016-06-VLD-CAS-MSS-SIP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Hardware Implementation of Stochastic Gammatone Filter 
Sub Title (in English)  
Keyword(1) probabilistic computation  
Keyword(2) auditory filtering  
Keyword(3) digital integrated circuits  
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1st Author's Name Naoya Onizawa  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Shunsuke Koshita  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Shuichi Sakamoto  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
4th Author's Name Masahide Abe  
4th Author's Affiliation Tohoku University (Tohoku Univ.)
5th Author's Name Masayuki Kawamata  
5th Author's Affiliation Tohoku University (Tohoku Univ.)
6th Author's Name Takahiro Hanyu  
6th Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2016-06-16 11:20:00 
Presentation Time 20 minutes 
Registration for CAS 
Paper # CAS2016-6, VLD2016-12, SIP2016-40, MSS2016-6 
Volume (vol) vol.116 
Number (no) no.93(CAS), no.94(VLD), no.95(SIP), no.96(MSS) 
Page pp.29-34 
#Pages 6 
Date of Issue 2016-06-09 (CAS, VLD, SIP, MSS) 

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