Paper Abstract and Keywords |
Presentation |
2016-09-16 11:30
Impedance Balance Method Applicable to Asymmetric Switching Circuits for Reducing Common-Mode Noise Taiki Nishimoto, Akira Minegishi, Masahiro Yamaoka, Kazuyuki Sakiyama, Toru Yamada (Panasonic), Tohlu Matsushima, Osami Wada (Kyoto Univ.) EMCJ2016-51 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This report presents a novel circuit design for suppressing conducted common-mode noise in boost converters. We have derived an impedance-balance equation for reduction of the noise from switching devises by applying a bridge-shaped equivalent circuit to the converter. To obtain wide operating frequency range, each output terminal is connected to the circuit ground via a series circuit consisting of a capacitor and an inductor. This can provide suppression of the common-mode noise, which is caused by switching of the transistor and the diode. The EMI reduction of up to 20 dB has been obtained in the range of 1 MHz to 20 MHz with a test board. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Boost Converter / Impedance Balance / EMC / Common Mode Noise / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 223, EMCJ2016-51, pp. 7-12, Sept. 2016. |
Paper # |
EMCJ2016-51 |
Date of Issue |
2016-09-09 (EMCJ) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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EMCJ2016-51 |
Conference Information |
Committee |
EMCJ |
Conference Date |
2016-09-16 - 2016-09-16 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
University of Hyogo |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Absorber, Shield, EMC |
Paper Information |
Registration To |
EMCJ |
Conference Code |
2016-09-EMCJ |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Impedance Balance Method Applicable to Asymmetric Switching Circuits for Reducing Common-Mode Noise |
Sub Title (in English) |
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Keyword(1) |
Boost Converter |
Keyword(2) |
Impedance Balance |
Keyword(3) |
EMC |
Keyword(4) |
Common Mode Noise |
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1st Author's Name |
Taiki Nishimoto |
1st Author's Affiliation |
Panasonic Corporation (Panasonic) |
2nd Author's Name |
Akira Minegishi |
2nd Author's Affiliation |
Panasonic Corporation (Panasonic) |
3rd Author's Name |
Masahiro Yamaoka |
3rd Author's Affiliation |
Panasonic Corporation (Panasonic) |
4th Author's Name |
Kazuyuki Sakiyama |
4th Author's Affiliation |
Panasonic Corporation (Panasonic) |
5th Author's Name |
Toru Yamada |
5th Author's Affiliation |
Panasonic Corporation (Panasonic) |
6th Author's Name |
Tohlu Matsushima |
6th Author's Affiliation |
Kyoto University (Kyoto Univ.) |
7th Author's Name |
Osami Wada |
7th Author's Affiliation |
Kyoto University (Kyoto Univ.) |
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Speaker |
Author-1 |
Date Time |
2016-09-16 11:30:00 |
Presentation Time |
25 minutes |
Registration for |
EMCJ |
Paper # |
EMCJ2016-51 |
Volume (vol) |
vol.116 |
Number (no) |
no.223 |
Page |
pp.7-12 |
#Pages |
6 |
Date of Issue |
2016-09-09 (EMCJ) |
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